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1、NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH A Report by the SUBCOMMITTEE ON MICROELECTRONICS LEADERSHIP COMMITTEE ON HOMELAND AND NATIONAL SECURITY of the NATIONAL SCIENCE AND TECHNOLOGY COUNCIL March 2024NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH About the Office of Science and Technology Po

2、licy The Office of Science and Technology Policy(OSTP)was established by the National Science and Technology Policy,Organization,and Priorities Act of 1976 to provide the President and others within the Executive Office of the President with advice on the scientific,engineering,and technological asp

3、ects of the economy,national security,homeland security,health,foreign relations,the environment,and the technological recovery and use of resources,among other topics.OSTP leads interagency science and technology policy coordination efforts,assists the Office of Management and Budget(OMB)with an an

4、nual review and analysis of federal research and development in budgets,and serves as a source of scientific and technological analysis and judgment for the President with respect to major policies,plans,and programs of the federal government.More information is available at www.whitehouse.gov/ostp/

5、nstc.About the National Science and Technology Council The National Science and Technology Council(NSTC)is the principal means by which the Executive Branch coordinates science and technology policy across the diverse entities that make up the federal research and development enterprise.A primary ob

6、jective of the NSTC is to ensure that science and technology policy decisions are consistent with the Presidents stated goals.The NSTC prepares research and development strategies that are coordinated across federal agencies aimed at accomplishing multiple national goals.The work of the NSTC is orga

7、nized under committees that oversee subcommittees and working groups focused on different aspects of science and technology.More information is available at www.whitehouse.gov/ostp/nstc.About the Subcommittee on Microelectronics Leadership The Subcommittee on Microelectronics Leadership(SML)of the N

8、STC was established pursuant to Section 9906 of the William M.(Mac)Thornberry National Defense Authorization Act for Fiscal Year 2021(Public Law 116-283),Title XCIX.SML coordinates activities across the Executive Branch of the federal government related to U.S.leadership and competitiveness in micro

9、electronics technology and innovation.SML is also helping to coordinate Executive Branch implementation of the CHIPS Act of 2022(Division A of Public Law 117-167)with the broader whole-of-government effort to grow the nations semiconductor manufacturing base and accelerate microelectronics research

10、and development(R&D),including activities by agencies not funded specifically to perform additional semiconductor/microelectronics R&D under the CHIPS Act of 2022(e.g.,the National Science Foundation,the Department of Energy,and the Defense Advanced Research Projects Agency).About this document This

11、 document is the National Strategy on Microelectronics Research called for in Section 9906 of Public Law(P.L.)116-283,Title XCIX.This strategy identifies four goals to guide agency efforts in microelectronics research to(a)accelerate the domestic development and production of microelectronics and st

12、rengthen the domestic microelectronics workforce;and(b)ensure that the United States remains a global leader in the field of microelectronics R&D.In addition to input from the many agencies represented on SML,it reflects extensive consultation with the Industrial Advisory Committee established under

13、 P.L.116-283 as well as other stakeholders from industry,non-governmental organizations,and academia.Disclaimer Reference in this report to any product,service,enterprise,or individual,including any written works(i.e.,books,articles,papers)is not an endorsement and does not imply official U.S.govern

14、ment sanction or endorsement of those entities or their views.Links to non-U.S.government websites do not constitute or imply official U.S.government or OSTP endorsement of or responsibility for the opinions,ideas,data,or products presented at those locations,or guarantee the validity of the informa

15、tion provided.Copyright information This document is a work of the United States government and is in the public domain(see 17 USC 105).Subject to stipulations below,it may be distributed and copied,with acknowledgement to OSTP.Copyrights to graphics included in this document are reserved by origina

16、l copyright holders or their assignees and are used here under the governments license and by permission.Requests to use any images must be made to the provider identified in the image credits,or to OSTP if no provider is identified.Published in the United States of America,2024.NATIONAL STRATEGY ON

17、 MICROELECTRONICS RESEARCH i NATIONAL SCIENCE AND TECHNOLOGY COUNCIL Chair:Arati Prabhakar,Assistant to the President for Science and Technology;Director,White House Office of Science and Technology Policy Acting Executive Director:Kei Koizumi,Principal Deputy Director for Policy,Office of Science a

18、nd Technology PolicySUBCOMMITTEE ON MICROELECTRONICS LEADERSHIP(SML)SML Co-Chairs:Jason Boehm,DOC Lisa Friedersdorf,OSTP Carl McCants,DOD SML Executive Secretary:Corey Stambaugh,NIST SUBCOMMITTEE ON MICROELECTRONICS LEADERSHIP PARTICIPANTS Office of Science and Technology Policy(OSTP)Lisa Friedersdo

19、rf Dana Weinstein National Economic Council(NEC)Peter Devine National Security Council(NSC)Nikita Lalwani Office of Management and Budget(OMB)Nancy Kenly William McNavage Office of the U.S.Trade Representative(USTR)Rebecca Gudicello National Coordination Office for Networking and Information Technol

20、ogy R&D(NITRD)Craig Schlenoff National Nanotechnology Coordination Office(NNCO)Branden Brough Quinn Spadola National Quantum Coordination Office(NQCO)Charles Tahan Department of Commerce(DOC)International Trade Administration(ITA)Paul Litwin Luke Myers National Institute of Standards and Technology(

21、NIST)Jason Boehm Richard-Duane Chambers David Gundlach J.Alexander Liddle Eric Lin Robert Rudnitsky Department of Defense(DOD)Carl McCants Alison Smith Devanand Shenoy Department of Energy(DOE)Hal Finkel Andrew Schwartz Department of Health and Human Services(HHS)National Institutes of Health(NIH)Da

22、vid Rampulla Department of Homeland Security(DHS)Jalal Mapar Pauline Paki NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH ii Department of State(State)Kakoli Ray Michael Masuda Elizabeth Melenbrink Scott Sellars National Science Foundation(NSF)Dilma Da Silva Erwin Gianchandani Germano Iannacchione Ba

23、rry Johnson Anthony A.Maciejewski Office of the Director of National Intelligence(ODNI)John Beieler Eric Cheng Donald Parrish NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH iii Table of Contents Abbreviations and Acronyms.v Executive Summary.vi Introduction.1 The Microelectronics Innovation Ecosyste

24、m.7 A Whole-of-Government Approach.10 Goal 1.Enable and Accelerate Research Advances for Future Generations of Microelectronics.11 1.1:Accelerate the research and development of materials that provide new capabilities or functional enhancements.15 1.2:Increase the capabilities of circuit design,simu

25、lation,and emulation tools.16 1.3:Develop a diverse array of robust processing architectures and associated hardware needed for future systems.16 1.4:Develop processes and metrology for advanced packaging and heterogeneous integration.17 1.5:Prioritize hardware integrity and security as an element i

26、n co-design strategies across the stack.18 1.6:Invest in R&D for manufacturing tools and processes needed to support transition of innovations into production-worthy fabrication processes.19 Goal 2.Support,Build,and Bridge Microelectronics Infrastructure from Research to Manufacturing.21 2.1:Support

27、 federated networks of device-scale R&D fabrication and characterization user facilities.22 2.2:Improve access for the academic and small-business research community to flexible design tools and wafer-scale fabrication resources.24 2.3:Facilitate research access to key functional materials.25 2.4:Ex

28、pand access to advanced cyberinfrastructure for modeling and simulation.25 2.5:Support advanced research,development,and prototyping to bridge the lab-to-fab gap.26 2.6:Support advanced assembly,packaging,and testing.29 Goal 3.Grow and Sustain the Technical Workforce for the Microelectronics R&D to

29、Manufacturing Ecosystem.30 3.1:Support learners and educators in and across science and technology disciplines relevant to microelectronics.32 3.2:Foster meaningful public engagement in microelectronics and raise awareness of career opportunities in the semiconductor industry.34 3.3:Prepare an inclu

30、sive current and future microelectronics workforce.35 3.4:Build and drive microelectronics research and innovation capacity.37 NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH iv Goal 4.Create a Vibrant Microelectronics Innovation Ecosystem to Accelerate the Transition of R&D to U.S.Industry.39 4.1:Su

31、pport,build,and bridge centers,public private partnerships,and consortia to deepen collaboration among various stakeholders in the microelectronics ecosystem.40 4.2:Engage with and leverage the CHIPS Industrial Advisory Committee.44 4.3:Motivate and align the microelectronics community on key techni

32、cal challenges with R&D roadmaps and grand challenges.45 4.4:Facilitate academic,government,and industrial exchange to broaden understanding of needs and opportunities.46 4.5:Support entrepreneurship,start-ups,and early-stage businesses through targeted programs and investments.46 Advancing Research

33、 and Development to Support Manufacturing and Supply Chain Security.49 International Collaboration and the Role of Trade and Diplomacy.49 Future Directions.51 NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH v Abbreviations and Acronyms1 2D two-dimensional 3D three-dimensional 3DHI 3D heterogeneous in

34、tegration ADK assembly design kit AI artificial intelligence CHIPS Creating Helpful Incentives to Produce Semiconductors(abbreviation for P.L.116-283,Title XCIX,and Division A of P.L.117-167)CMOS complementary metal-oxide-semiconductor DARPA Defense Advanced Research Projects Agency DTCO design-tech

35、nology co-optimization EDA electronic design automation ENIAC Electronic Numerical Integrator and Computer FFRDC Federally Funded Research and Development Center FLOPS floating-point operations per second HBCU(s)Historically Black Colleges and Universities IP intellectual property KSAs knowledge,ski

36、lls,and abilities MEMS microelectromechanical systems MGI Materials Genome Initiative ML machine learning MSI minority-serving institution NASA National Aeronautics and Space Administration NGMM Next-Generation Microsystems Manufacturing(DARPA program)nm nanometer NNCI National Nanotechnology Coordi

37、nated Infrastructure(NSF program)NNI National Nanotechnology Initiative NSTC National Semiconductor Technology Center(also,National Science and Technology Council)OECD Organisation for Economic Co-operation and Development OSTP Office of Science and Technology Policy PDK process design kit RFI Reque

38、st for Information R&D research and development Si silicon STCO system technology co-optimization STEM science,technology,engineering,and mathematics TCCU Tribally Controlled Colleges and Universities 1 See the Subcommittee on Microelectronics Leadership roster(pp.i-ii)for spelling out of acronyms o

39、f participating agency names.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH vi Executive Summary Decades ago,American innovation sparked the research advances that led to the semiconductor industry of today.This industry is global,underpins everything from health to communications,and is essential f

40、or the economy and security of the United States.The significant investments made possible by the bipartisan CHIPS Acts provide opportunities to reinvigorate domestic manufacturing in this critical sector,and strengthen the microelectronics research and development(R&D)innovation ecosystem that can

41、advance the American competitive position for the future.This National Strategy on Microelectronics Research presents goals,key needs,and actions required over the next five years to realize these opportunities.This strategy provides the framework for federal departments and agencies,academia,indust

42、ry,nonprofits,and international allies and partners to address key needs and build out the microelectronics research and development infrastructure to support the future advances that will shape the semiconductor field.As highlighted throughout this report,the significant CHIPS R&D investments under

43、way must be fully leveraged and coordinated with the broad portfolio of ongoing programs,activities,and resources that contribute to microelectronics research and development.Over the next five years,the White House and federal departments and agencies will work together to advance four interconnect

44、ed goals:Enable and Accelerate Research Advances for Future Generations of Microelectronics Support,Build,and Bridge Microelectronics Infrastructure from Research to Manufacturing Grow and Sustain the Technical Workforce for the Microelectronics Research and Development to Manufacturing Ecosystem Cr

45、eate a Vibrant Microelectronics Innovation Ecosystem to Accelerate the Transition of Research and Development to U.S.Industry The first goal focuses on key research needs in several areas that are required to accelerate the advances required for future generations of microelectronic systems.Research

46、 areas include materials that can provide new capabilities;circuit design,simulation,and emulation tools;new architectures and associated hardware designs;processes and metrology for advanced packaging and heterogeneous integration;hardware integrity and security;and manufacturing tools and processe

47、s to enable transition of new innovations into production.These research areas require access to specialized tools and equipment.The second goal is focused on supporting,expanding,and connecting the research infrastructure from small-scale material and device-level fabrication and characterization t

48、hrough prototyping,large-scale fabrication,and advanced assembly,packaging,and testing.The required tools include both software(including design tools)and commercial-scale production and metrology hardware.Expansion of the domestic semiconductor industry will also expand opportunities for good-payin

49、g jobs across the country.Goal three identifies efforts to support learners and educators in the development of the technical workforce required from research through manufacturing.Finally,goal four is focused on the entire R&D landscape and presents strategies and actions to create a vibrant microe

50、lectronics innovation ecosystem to accelerate the transition of new advances into commercial applications.Key efforts not only support actions at each stage of the microelectronics technology development pathway,but also connect the various networks and activities to build a virtuous cycle of microe

51、lectronics innovation.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH vii These four goals will be pursued in the context of the global nature of the semiconductor industry.As is the case with the semiconductor manufacturing supply chain,research facilities and talent that support the microelectronic

52、s innovation ecosystem are located all over the world.International collaboration,trade,and diplomacy are important tools to leverage efforts and resources,promote talent flow and research collaboration,and ensure secure supply chains.Implementation of this strategy will result in a vibrant innovati

53、on ecosystem that accelerates new research breakthroughs,supports the transition of these advances to manufacturing,and provides good-paying jobs to people all across America.A fully built-out and well-connected microelectronics research infrastructure will provide the foundation for researchers to

54、advance their breakthroughs and lead to a virtuous innovation cycle.Nurturing and supporting microelectronics innovation will help secure future leadership in the semiconductor industry for the security and prosperity of the United States and its allies and partners.NATIONAL STRATEGY ON MICROELECTRO

55、NICS RESEARCH 1 Introduction The microelectronics2 revolution has transformed society.Nearly all aspects of modern life are now dependent on semiconductor technology,including communications,computing,entertainment,health care,energy,and transportation.As a result,microelectronics are essential to t

56、he economic and national security of the United States.Rapid innovation in the semiconductor industry has been fueled for decades by research and development(R&D)investments in hardware and software by the federal government and the private sector.3 The intense race to continually increase the perfo

57、rmance and functionality of microelectronics,while maintaining or reducing cost and power requirements,has driven the fabrication of ever smaller and more densely integrated microelectronic components.This miniaturization has required continuous breakthroughs in materials,tools,and design that have

58、enabled key structures within the components to have dimensions as small as a few atoms in size.While reductions in feature size have led to dramatic increases in digital information storage and processing capacity,there have also been many significant advances in analog and non-silicon technologies

59、 that are critical for communications,power,and sensing.The required advances in manufacturing have been enabled by significant investments not only in R&D,but also in developing the manufacturing and metrology equipment and the associated fabrication(“fabs”)and packaging facilities required to make

60、 advanced integrated circuits and components.The complexity and cost of manufacturing at this scaleestablishing a leading-edge4 silicon fab complex now costs tens of billions of dollars5has contributed to significant consolidation in the industry.Today,only three corporations in the world are compet

61、ing to manufacture the latest generations of advanced logic devices.6 In June 2021,the White House released Building Resilient Supply Chains,Revitalizing American Manufacturing,and Fostering Broad-Based Growth,a report on critical supply chains,including the semiconductor manufacturing and advanced

62、packaging supply chain.7 The report noted that although U.S.-headquartered semiconductor companies accounted for nearly half of worldwide revenue,the share of global semiconductor manufacturing conducted domestically had dropped from 37%in 1990 to 12%,and the U.S.share of packaging had fallen to 3%.

63、8 As discussed in the report,modern 2 Microelectronics in this context refers to integrated electronic devices and systems generally manufactured using semiconductor-based materials and related processing(i.e.,in a semiconductor fabrication manufacturing facility,or“fab”).Such devices and systems in

64、clude analog and digital electronics,power electronics,optics and photonics,and micromechanics for memory,processing,sensing,and communications applications.3 The semiconductor industry refers to the manufacturing sector including design and production of products consisting of semiconductor-based e

65、lectronic devices and integrated circuits,along with advanced packaging and power electronics.4 “Leading-edge”refers to the most miniaturized or“scaled”digital computing and memory technologycurrently denoted the“3 nm node”with new,smaller nodes being produced every two to three years.5 For example,

66、see,TSMC looks to double down on U.S.chip factories as talks in Europe falter,https:/ Intel:Upcoming U.S.Fab Will Be a Small City,to Cost$60 to$120 Billion,https:/ See,The Semiconductor Supply Chain:Assessing National Competitiveness,https:/cset.georgetown.edu/wp-content/uploads/The-Semiconductor-Su

67、pply-Chain-Issue-Brief.pdf.7 Building Resilient Supply Chains,Revitalizing American Manufacturing,and Fostering Broad-Based Growth,The White House,2021,https:/www.whitehouse.gov/wp-content/uploads/2021/06/100-day-supply-chain-review-report.pdf.Note:This initial report did not include power electroni

68、cs or other specialized semiconductors for clean energy applications such as photovoltaics(PVs),which were addressed in follow-on reports:https:/www.energy.gov/policy/securing-americas-clean-energy-supply-chain.8 The U.S.share of global assembly,test,and packaging is now estimated to be less than 2%

69、:https:/www.bis.doc.gov/index.php/documents/technology-evaluation/3402-section-9904-report-final-20231221/file.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 2 microelectronics manufacturing is an incredibly complex and global process,involving hundreds of steps completed over several months,with ma

70、ny components using international expertise and facilities as they traverse the world several times.The report concluded that the public and private sectors need to act to increase domestic manufacturing capacity for critical goods,recruit and train a domestic workforce,invest in R&D,and work with A

71、mericas allies and partners to collectively strengthen supply chain resilience.National Strategy on Microelectronics ResearchGoals and Objectives Goal 1.Enable and Accelerate Research Advances for Future Generations of Microelectronics 1.1:Accelerate the research and development of materials that pr

72、ovide new capabilities or functional enhancements.1.2:Increase the capabilities of circuit design,simulation,and emulation tools.1.3:Develop a diverse array of robust processing architectures and associated hardware needed for future systems.1.4:Develop processes and metrology for advanced packaging

73、 and heterogeneous integration.1.5:Prioritize hardware integrity and security as an element in co-design strategies across the stack.1.6:Invest in R&D for manufacturing tools and processes needed to support transition of innovations into production-worthy fabrication processes.Goal 2.Support,Build,a

74、nd Bridge Microelectronics Infrastructure from Research to Manufacturing 2.1:Support federated networks of device-scale R&D fabrication and characterization user facilities.2.2:Improve access for the academic and small-business research community to flexible design tools and wafer-scale fabrication

75、resources.2.3:Facilitate research access to key functional materials.2.4:Expand access to advanced cyberinfrastructure for modeling and simulation.2.5:Support advanced research,development,and prototyping to bridge the lab-to-fab gap.2.6:Support advanced assembly,packaging,and testing.Goal 3.Grow an

76、d Sustain the Technical Workforce for the Microelectronics R&D to Manufacturing Ecosystem 3.1:Support learners and educators in and across science and technology disciplines relevant to microelectronics.3.2:Foster meaningful public engagement in microelectronics and raise awareness of career opportu

77、nities in the semiconductor industry.3.3:Prepare an inclusive current and future microelectronics workforce.3.4:Build and drive microelectronics research and innovation capacity.Goal 4.Create a Vibrant Microelectronics Innovation Ecosystem to Accelerate the Transition of R&D to U.S.Industry 4.1:Supp

78、ort,build,and bridge centers,public private partnerships,and consortia to deepen collaboration among various stakeholders in the microelectronics ecosystem.4.2:Engage with and leverage the CHIPS Industrial Advisory Committee.4.3:Motivate and align the microelectronics community on key technical chal

79、lenges with R&D roadmaps and grand challenges.4.4:Facilitate academic,government,and industrial exchange to broaden understanding of needs and opportunities.4.5:Support entrepreneurship,start-ups,and early-stage businesses through targeted programs and investments.NATIONAL STRATEGY ON MICROELECTRONI

80、CS RESEARCH 3 Microelectronics have become essential for many aspects of everyday life.Semiconductors are critical to U.S.economic and national security and have become essential to many aspects of everyday life.Examples depicted here include automotive,health care,aerospace,virtual reality,financia

81、l systems,e-commerce,space satellites,defense,energy,computing,agriculture,and telecommunications.As microelectronic devices have become pervasive,their key performance requirements have become increasingly diverse,necessitating a divergence from the traditional scaling in feature size exemplified b

82、y Moores Law.For example,the requirements for satellite applications include proven technologies that are radiation hardened,supercomputers maximize performance and speed,but devices on the edge such as sensors may prioritize low power.These application-specific requirements are driving an increased

83、 diversification of microelectronics,which will be enabled and advanced by approaches such as heterogeneous integration and chiplets.Image credits:Adobe istock.The White House supply chain report emphasized the importance of the semiconductor industry to the U.S.economy,which ranked fifth overall in

84、 U.S.export sales in 2022.9 The federal government is also an important consumer of microelectronics,and it is critical that it has access to trusted and assured microelectronics for essential functions such as communications,navigation,sensing,critical infrastructure,public health,and national secu

85、rity.Microelectronics underpin a wide range of emerging technologies including quantum information sciences,artificial intelligence,advanced wireless networks(6G and beyond),safe and secure health care technologies,and clean-energy and energy-efficient technologies needed to address the climate cris

86、is.10 9 State of the U.S.Semiconductor Industry,Semiconductor Industry Association,2023,https:/www.semiconductors.org/wp-content/uploads/2023/07/SIA_State-of-Industry-Report_2023_Final_072723.pdf,p.23 10 Climate change widespread,rapid,and intensifying,IPCC,https:/www.ipcc.ch/2021/08/09/ar6-wg1-2021

87、0809-pr NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 4 ENIAC on a chip To illustrate the significant changes in size and scale of computing technologies,students designed and built“ENIAC-on-a-chip”to celebrate the 50th anniversary of the first programmable,electronic,general-purpose digital comput

88、er called the Electronic Numerical Integrator and Computer(ENIAC).11 ENIAC was designed under a U.S.Army R&D program and was completed in 1945.ENIAC contained over 18,000 vacuum tubes and was approximately 8 feet tall,3 feet deep,100 feet long,and weighed more than 30 tons.ENIAC was programmed by ha

89、nd using cables and switches,as illustrated in the figure on the left.The image on the right depicts a chip that recreated ENIAC using 0.5 m complementary metal-oxide-semiconductor(CMOS)technology in 1995,replacing the vacuum tubes with transistors.Using todays technology,the chip would be approxima

90、tely 1,000 times smaller.With respect to performance,ENIAC could do about 500 floating-point operations per second(FLOPS)while the Frontier supercomputer at Oak Ridge National Laboratory can now do more than one quintillion(1,000,000,000,000,000,000)FLOPS.Image credits:LeftAlamy Stock Photo;RightTru

91、stees of the University of Pennsylvania,all rights reserved,1998(photo by Felice Macera).It is because of the importance of this industry to the nations economy and security that the bipartisan CHIPS Act of 2022(Division A of the CHIPS and Science Act of 202212)was enacted and appropriated more than

92、$52 billion to grow the nations semiconductor manufacturing base and accelerate microelectronics R&D.Moreover,several recent reports have emphasized the importance of the industry.For example,in a 2018 assessment,the Department of Defense(DOD)identified threats to the microelectronics supply chain a

93、s well as related R&D and manufacturing issues for multiple critical defense sectors.13 In 20202023,the Congressional Research Service(CRS)examined the technical challenges facing the semiconductor industry,domestic and global supply chains,secure and trusted production of semiconductors for nationa

94、l security,and associated federal policies and research investments,along with possible legislation to address these challenges.14 The Final Report of the 11 https:/www.seas.upenn.edu/jan/eniacproj.html 12 CHIPS Act of 2022(Division A of Public Law 117-167),https:/www.congress.gov/bill/117th-congres

95、s/house-bill/4346/text:https:/www.congress.gov/bill/117th-congress/house-bill/4346 13 Assessing and Strengthening the Manufacturing and Defense Industrial Base and Supply Chain Resiliency of the United States,DOD,2018,https:/media.defense.gov/2018/oct/05/2002048904/-1/-1/1/assessing-and-strengthenin

96、g-the-manufacturing-and%20defense-industrial-base-and-supply-chain-resiliency.pdf 14 See:Semiconductors:U.S.Industry,Global Competition,and Federal Policy,Congressional Research Service,2020,https:/crsreports.congress.gov/product/pdf/R/R46581;Semiconductors,CHIPS for America,and Appropriations in th

97、e U.S.Innovation and Competition Act(S.1260),Congressional Research Service,2022,https:/crsreports.congress.gov/product/pdf/IF/IF12016;Semiconductors and the Semiconductor Industry,https:/crsreports.congress.gov/product/pdf/R/R47508;Frequently Asked Questions:CHIPS Act of 2022 Provisions and NATIONA

98、L STRATEGY ON MICROELECTRONICS RESEARCH 5 National Security Commission on Artificial Intelligence(AI)identified domestically-located semiconductor fabs as a requirement to maintain the nations leadership in AI.15 Semiconductors and microelectronics were also identified as areas of particular importa

99、nce to the national security of the United States in the updated Critical and Emerging Technologies List.16 Just how small is a transistor?The following images show the size of transistors compared to an ant.The diameter of the circle around the picture of the ant depicts 2 millimeters(mm),or 0.002

100、meters.The next image is a picture taken in a scanning electron microscope(SEM)of an ants eye,about 150 micrometers(m),or 0.00015 meters in diameter.The third image is a picture of a hair on the ants eye.The circle is 20 m across.The fourth picture is a close-up SEM image of the hair,showing grooves

101、 on the hair.The diameter is 1 m(or one thousand nanometers nm).A cross-section of integrated circuit transistors is shown in the top electron microscope image,illustrating modern integrated circuit transistors fit into a groove of the hair on an ants eye.The diameter of this image is just 50 nm.Ima

102、ge credits:Bottom imagesNational Institute of Standards and Technology(NIST);Upper right imagereprint courtesy of IBM Corporation.Microelectronics R&D is essential to continue advancing technology and systems,and to realize the long-term goal of strengthening domestic manufacturing and mitigating su

103、pply chain risks.Additionally,input from federal Requests for Information(RFIs),17 recommendations from the Implementation,https:/crsreports.congress.gov/product/pdf/R/R47523;Semiconductors and the CHIPS Act:The Global Context,Congressional Research Service,2023,https:/crsreports.congress.gov/produc

104、t/pdf/R/R47558.15 See Chapter 13 of Final Report,National Security Commission on Artificial Intelligence,2021,https:/www.nscai.gov/wp-content/uploads/2021/03/Full-Report-Digital-1.pdf.16 https:/www.whitehouse.gov/wp-content/uploads/2022/02/02-2022-Critical-and-Emerging-Technologies-List-Update.pdf 1

105、7 Relevant RFIs include Current and Future Workforce Needs to Support a Strong Domestic Semiconductor Industry,NIST,DOC,2018,https:/www.federalregister.gov/documents/2018/07/16/2018-15077/current-and-future-workforce-needs-to-support-a-strong-domestic-semiconductor-industry;National Nanotechnology I

106、nitiative Strategic Planning,OSTP,2020,https:/www.federalregister.gov/documents/2020/10/13/2020-22556/request-for-information-national-nanotechnology-initiative-strategic-planning;Microelectronics R&D Facility Capabilities for Prototyping,DOD,2020,https:/sam.gov/opp/eaf0eb36b54542b28c6ee88252e9f4b0/

107、view;Basic Research Initiative for Microelectronics,Office of Science,DOE,2019,https:/www.federalregister.gov/documents/2019/07/12/2019-14869/request-for-information-basic-2 mm2,000,000 nm20 m20,000 nm150 m150,000 nm1 m1,000 nmTransistors fit in groove of hair on ants eyeAntAnts eyeHair on ants eyeG

108、roove on hair on ants eye50 nmNATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 6 stakeholder community,and multiple other reports from the public and private sectors,18,19 make it clear that a strong,innovative domestic R&D effort is vital to future U.S.competitiveness and security.Taken all together,

109、a set of key R&D trends and opportunities emerge from these resources:The diversity of devices and their applications continues to grow beyond conventional processors and memory,requiring innovation throughout the generation,communication,storage,and processing of data across many scales and types o

110、f information systems.Microelectronics technology is critical to fields beyond information technology,with tremendous growth expected in areas such as power management,medical devices,and sensing.A comprehensive approach to R&D across the“full stack”provides an opportunity to achieve performance,rel

111、iability,and security improvements in devices and systems.Although much attention is focused on the design and scaling of foundational devices,there are also major challenges ahead for fabrication,metrology,testing,verification and validation,heterogeneous integration,and advanced packaging.Moreover

112、,challenges are not limited to hardware:advances in devices,design and manufacturing,circuits,and systems integration require concomitant innovations across the computer architecture,software,and application layers.Integrated design offers an approach to accelerate innovation.In addition,it can ensu

113、re that critical system attributes are captured from the start and considered throughout the development cycle,including performance,reliability,energy efficiency,and security.The U.S.microelectronics research ecosystem continues to excel at basic and early-stage applied research,but additional inve

114、stment in domestic infrastructure,a renewed emphasis on manufacturing science and engineering,and an agile workforce are needed to efficiently transition innovations to industry.Affordable and rapid access to design and prototyping capabilities will increasingly enable domestic innovations to transi

115、tion more rapidly from R&D into manufacturing.research-initiative-for-microelectronics;and Draft National Strategy on Microelectronics Research,OSTP,2022,https:/www.federalregister.gov/documents/2022/09/15/2022-19935/request-for-information-draft-national-strategy-on-microelectronics-research.18 Pub

116、lic sector reports include Basic Research Needs for Microelectronics,DOE,2018,https:/www.osti.gov/biblio/1545772;Semiconductor Foundry Access by U.S.Academic Researchers in Micro-and Nano-Circuits and Systems,NSF,2021,https:/nsfedaworkshop.nd.edu/assets/429148/nsf20_foundry_meeting_report.pdf;and Re

117、port of the first DOEAMO Workshop on Semiconductor RDD&D for Energy Efficiency,DOE,2021,https:/www.energy.gov/eere/amo/articles/amo-semiconductor-workshop-integrated-sensor-systems-report.In addition,summaries of other AMO workshops in this series can be found at https:/www.energy.gov/eere/ammto/res

118、ource-library.19 Private sector reports include,for example,Semiconductor Research Opportunities:An Industry Vision and Guide,Semiconductor Industry Association(SIA),2017,https:/www.semiconductors.org/wp-content/uploads/2018/06/SIA-SRC-Vision-Report-3.30.17.pdf;Chipping In:,SIA,2021,https:/www.semic

119、onductors.org/wp-content/uploads/2021/05/SIA-Impact_May2021-FINAL-May-19-2021_2.pdf;The Decadal Plan for Semiconductors,Semiconductor Research Corporation,2021,https:/www.src.org/about/decadal-plan,and An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,IPC,2021,https:/e

120、mails.ipc.org/links/IPCadvpack-ecosystem-report-final.pdf.What is“the stack”?Throughout this report,the“stack”or“full stack”refers to the full range of science and technology elements required to make up a complete microelectronics system shown in the figure at right,from the most basic levels of ha

121、rdware(e.g.,materials and circuits)all the way through the high-level software and the applications where it will be used.(Background image is a cross section of a state-of-the-art chip.Image credit:NIST.)NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 7 Capabilities are needed from the device scale

122、to the wafer scale,both near or at leading-edge process nodes,as well as at the more mature nodes important for analog and non-silicon technologies.Students and researchers need access to these capabilities for experiential workforce training.Access to well-prepared talent is a significant challenge

123、 across the entire value chain and will require both short-term and long-term solutions.Welcoming pathways are needed to make the United States a magnet for outstanding foreign talent in high-demand fields.Improvements in both curriculum and outreach are needed to develop and expand the equitable,in

124、clusive,and diverse domestic science,technology,engineering,and mathematics(STEM)talent pool to support microelectronics R&D and the semiconductor industry.Strong engagement with allies and partners is required to ensure the success of the entire innovation ecosystem.The semiconductor industry is gl

125、obal;no nation can bring together the technology,supply chains,and expertise to support leading-edge R&D and manufacturing alone.Tech diplomacy will be an important tool to engage allies and partners.Improving the energy efficiency of microelectronics is increasingly essential for sustainability.Rap

126、id growth in microelectronics use and the simultaneous slowing of energy efficiency improvements are creating new economic and environmental risks.To reduce these risks,microelectronics R&D investments must include a focus on energy efficiency and on full-life-cycle sustainability,including reducing

127、 the use of materials that are scarce or hazardous to the environment.Safeguarding intellectual property is essential to ensure that U.S.industry captures economic benefit to sustain private R&D investments.Key intellectual property developed by and within the United States must be protected,while a

128、lso improving the ability to appropriately share information among collaborative efforts.Applied research is intended to provide technical discriminators giving microelectronics manufacturers a strategic advantage in the marketplace.Safeguards(i.e.,cybersecurity,intellectual property enforcement,etc

129、.)must be implemented and effectively enforced to ensure that key innovations are not inadvertently or inappropriately infringed upon.These trends and opportunities have informed the goals,needs,and strategies presented in this document to accelerate the pace of innovation and translation through co

130、llaborative research,access to advanced infrastructure,and a culture of co-design across the microelectronics R&D enterprise.Attention must focus on developing and sustaining a vibrant and connected microelectronics ecosystem to ensure U.S.leadership in this important area.The Microelectronics Innov

131、ation Ecosystem The microelectronics innovation ecosystem is complex and extremely capital-,knowledge-,and R&D-intensive.20 Industry consolidation has imposed limits on the associated R&D ecosystem.With worldwide manufacturing of leading-edge microelectronics now dependent on only a handful of compa

132、nies,the opportunity for researchers to exploit advanced processes is limited.Researchers in academia,government,and industry who do not require high-volume production have limited access to the capabilities needed for advancing the R&D frontier,significantly constraining their ability to develop an

133、d transition innovations to leading-edge manufacturing.Limited access to leading-edge 20 For example,see Measuring distortions in international markets:The semiconductor value chain,OECD,2019,https:/www.oecd-ilibrary.org/trade/measuring-distortions-in-international-markets_8fe4491d-en;and Strengthen

134、ing the Global Semiconductor Supply Chain in an Uncertain Era,Boston Consulting Group and the Semiconductor Industry Association,2021,https:/www.semiconductors.org/strengthening-the-global-semiconductor-supply-chain-in-an-uncertain-era.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 8 capabilities al

135、so restricts opportunities to provide experiential training for workforce development.CHIPS Act investments aim to address these issues.Beyond the leading edge of current CMOS technology,the microelectronics industry is facing profound changes associated with the accelerated pace of innovation and a

136、n explosion in the diversity of technologies emerging from academia,Department of Energy(DOE)National Laboratories and other Federally Funded Research and Development Centers(FFRDCs),nonprofit laboratories,government facilities,and companies small and large.Effective pathways for transitioning new r

137、esearch advances into applications need to be established and strengthened to ensure that the United States captures the benefits from R&D investments and that key intellectual property(IP)is available for domestic manufacturing.Additionally,as new challenges are identified in manufacturing,these te

138、chnical needs must be communicated back to the research community.As part of the national R&D ecosystem,over 20 federal agencies fund R&D,with the nature of the activities determined by the mission of each agency.21 The Department of Commerce(DOC),National Aeronautics and Space Administration(NASA),

139、National Science Foundation(NSF),Department of Homeland Security(DHS),Department of Health and Human Services(HHS),DOD,DOE,and other federal agencies support both intramural R&D(conducted within government facilities and DOE National Laboratories)and extramural R&D(conducted by academia,industry,and

140、 other organizations through grants,contracts,and other agreements).The wide span of R&D activities supported by federal research funding requires that IP developed is protected from unintentional,forced,or coerced technology transfer.Agencies also support workforce development across all educationa

141、l levels through a variety of mechanisms,including support for formal and informal learning,internships,and fellowships;curriculum development;and coordinated efforts to broaden participation in STEM.While each agency has mission-oriented priorities determining the focus of its microelectronics-rela

142、ted research,as discussed below and throughout this strategy,there are multiple interagency mechanisms in place to coordinate R&D priorities and programs and to ensure that the outcomes of research are shared for mutual benefit.Within the microelectronics innovation ecosystem,an important element of

143、 federal funding is support for infrastructure along the technology development pathway.For early-stage research,many facilities exist in academic institutions,government facilities,and DOE National Laboratories and other FFRDCs,particularly for the fabrication and characterization of materials and

144、devices.Another area of federal investment is in cyber infrastructure,including modeling,simulation,and data.Several user facility networks connected to the National Nanotechnology Initiative(NNI)22 provide researchers from academia,industry,and government with access to suites of tools and scientif

145、ic expertise that support microelectronics R&D.These facilities have vastly broadened participation of researchers from small businesses and institutions that would not be able to purchase the equipment on their own.This has helped democratize innovation that requires specialized facilities and equi

146、pment,especially for semiconductor R&D and fabrication.Once proofs of concepts at the device level are achieved,innovation often becomes hindered in the current U.S.ecosystem by a lack of access to the necessary advanced development capabilities.Investments in domestic materials supply,design,fabric

147、ation,and packaging capabilities are required to address this laboratory-to-fabrication(lab-to-fab)gap.Investments are required to enable and sustain advanced prototyping and scale-up of new devices and architectures,along with the associated manufacturing and metrology instrumentation,and in concer

148、t with the required design of software and 21 See Research and Development chapter of Analytical Perspectives:Budget of the U.S.Government,Fiscal Year 2024:https:/www.whitehouse.gov/wp-content/uploads/2023/03/ap_6_research_fy2024.pdf.22 https:/www.nano.gov/userfacilities NATIONAL STRATEGY ON MICROEL

149、ECTRONICS RESEARCH 9 applications.Moreover,access to these capabilities by both researchers and students will provide hands-on experiential training to expand the domestic microelectronics workforce.The CHIPS for America Act of 202123 authorized multiple programs to help bridge this lab-to-fab gap,w

150、hile the CHIPS Act of 202224 appropriated funding for the programs.Section 9903 of the CHIPS for America Act of 2021 authorizes DOD to establish a National Network for Microelectronics Research and Development to enable the lab-to-fab transition of microelectronics innovations in the United States.S

151、ection 9906 directs DOC to establish a National Semiconductor Technology Center to conduct research and prototyping of advanced semiconductor technologies;a microelectronics research program at NIST to conduct semiconductor metrology research and development;a National Advanced Packaging Manufacturi

152、ng Program to strengthen semiconductor advanced test,assembly,and packaging capabilities;and up to three Manufacturing USA institutes focused on semiconductor manufacturing.Within the broader U.S.R&D ecosystem,there are many regional innovation hubs around the country composed of industry clusters c

153、omplemented by federally supported academic centers,often focused on specific technologies and/or local research strengths.These local hubs are valuable national resources,and ensuring that they are well coupled to other elements of the overall R&D ecosystem,including microelectronics,will strengthe

154、n the national innovation base.The U.S.semiconductor industry invests heavily in R&D efforts,estimated to be nearly$60 billion in 2022.25 To maintain their world-leading expenditures on R&D,U.S.companies must have access to foreign markets where they can compete and win based on superior technology.

155、Trade policy must protect U.S.companies from discrimination in global markets.Collaboration and alignment with allies and partners will help address national security concerns and help U.S.companies hold their ground in the intense global competition for technology leadership.The White House and fed

156、eral departments and agencies recognize that openness is a foundation for R&D leadership and that international talent flow is critical to the success of the global enterprise.26,27 However,as made clear in Guidance for Implementing National Security Presidential Memorandum 33(NSPM-33),28 the U.S.go

157、vernment and its partners must strengthen protections of R&D against foreign government interference and exploitation,diligently safeguarding intellectual capital and property.Protections may include improved,risk-based processes for evaluating research partnerships and proposed foreign investments;

158、active participation of U.S.experts in international standards organizations;closer coordination with international partners on research security;and a campaign of outreach and education on the importance of this topic across the microelectronics R&D community.29 23 William M.(Mac)Thornberry Nationa

159、l Defense Authorization Act for Fiscal Year 2021,(Public Law 116-283),Title XCIX(“Creating Helpful Incentives to Produce Semiconductors(CHIPS)for America”)(herein“CHIPS for America Act of 2021”)24 CHIPS Act of 2022(Division A of Public Law 117-167),https:/www.congress.gov/bill/117th-congress/house-b

160、ill/4346/text:https:/www.congress.gov/bill/117th-congress/house-bill/4346 25 State of the U.S.Semiconductor Industry,Semiconductor Industry Association,2023,https:/www.semiconductors.org/wp-content/uploads/2023/07/SIA_State-of-Industry-Report_2023_Final_072723.pdf,p.21 26 https:/www.quantum.gov/wp-c

161、ontent/uploads/2021/10/2021_NSTC_ESIX_INTL_TALENT_QIS.pdf 27 https:/www.whitehouse.gov/briefing-room/statements-releases/2022/01/21/fact-sheet-biden-harris-administration-actions-to-attract-stem-talent-and-strengthen-our-economy-and-competitiveness/.28 Guidance For Implementing National Security Pre

162、sidential Memorandum 33(NSPM-33)On National Security Strategy For United States Government-Supported Research And Development,https:/www.whitehouse.gov/wp-content/uploads/2022/01/010422-NSPM-33-Implementation-Guidance.pdf 29 United States Government National Standards Strategy for Critical and Emerg

163、ing Technology,White House,2023,https:/www.whitehouse.gov/wp-content/uploads/2023/05/US-Gov-National-Standards-Strategy-2023.pdf NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 10 A Whole-of-Government Approach Recognizing the critical role of microelectronics to our health,environment,economy,and na

164、tional security,a whole-of-government effort is underway to sustain and advance global leadership by the United States and its allies in this important field.On August 25,2022,President Biden released an Executive Order on the Implementation of the CHIPS Act of 2022 that identified implementation pr

165、iorities and established the CHIPS Implementation Steering Council to coordinate policy development to ensure the effective implementation of the Act within the Executive Branch.30 Co-chaired by the directors of the White House Office of Science and Technology Policy(OSTP),National Security Council(

166、NSC),and National Economic Council(NEC),the steering council includes secretaries from the departments of State,Treasury,Defense,Commerce,Labor,and Energy;the Director of the Office of Management and Budget(OMB);the Administrator of the Small Business Administration;the Director of National Intellig

167、ence;the Assistant to the President for Domestic Policy;the Chair of the Council of Economic Advisers;the National Cyber Director;the Director of the National Science Foundation,and the Director of the National Institute of Standards and Technology.This council ensures awareness of ongoing efforts a

168、nd investments across the government and coordinates policy development at the Cabinet level.In accordance with Section 9906(a)of the William Mac Thornberry National Defense Authorization Act for Fiscal Year 2021,OSTP established the Subcommittee on Microelectronics Leadership(SML)under the National

169、 Science and Technology Council.The Subcommittee membership includes the Department of Commerce,the Department of Defense,the Department of Energy,the Department of Health and Human Services,the National Science Foundation,the State Department,the Department of Homeland Security,and the Office of th

170、e Director for National Intelligence.White House components represented include OSTP,OMB,NEC,NSC,and the Office of the U.S.Trade Representative.Also pursuant to Section 9906(a),the Subcommittee is responsible for developing this National Strategy on Microelectronics Research;for coordinating microel

171、ectronics-related research,development,manufacturing,and supply chain security activities and budgets of federal agencies;and for ensuring that such activities are consistent with the strategy.As the body responsible for coordinating microelectronics efforts for the next decade,the SML is developing

172、 the structural framework and activities to best serve this role,including the establishment of working groups focused on education and workforce development,and on international engagement.The participating agencies are utilizing their respective authorities to advance R&D and promote policies to s

173、upport U.S.industry,protect intellectual property,and ensure domestic access to secure microelectronics.Agencies are also collaboratively supporting activities to improve STEM education and increase participation in STEM fields,and to train and expand the microelectronics workforce at all levels.The

174、 federal government is engaging and collaborating with allies and partners to strengthen the global microelectronics innovation ecosystem and secure supply chains.Coordinated through the White House,these efforts will not only fuel new research advances to drive microelectronics innovation,but will

175、also help these advances transition to manufacturing and provide good-paying jobs to people across all of America.As detailed in the sections below,the White House and federal departments and agencies will work together and with academia,industry,nonprofits,and international allies and partners to f

176、uel research advances for future generations of microelectronics;establish best practices to ensure efficient,30 https:/www.whitehouse.gov/briefing-room/presidential-actions/2022/08/25/executive-order-on-the-implementation-of-the-chips-act-of-2022/NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 11 ac

177、countable R&D execution;support and connect the microelectronics research infrastructure;expand,train,and support a diverse workforce;and facilitate the rapid transition of R&D to industry.31 Goal 1.Enable and Accelerate Research Advances for Future Generations of Microelectronics R&D supported by t

178、he federal government has been instrumental in laying the foundation for advances in microelectronics and in educating the research and skilled technical workforce needed for design,manufacturing,and application development.The increasing diversity of microelectronics technology and pace of innovati

179、on,combined with the growing risks to the global manufacturing and supply chain,requires a renewed federal focus on R&D investment in ways that will alter these trajectories and ensure the future health,economic leadership,and security of the nation.Success requires strategies that engage all sector

180、s of the R&D ecosystem and leverage education,workforce,manufacturing,trade,and regional economic development efforts and policies.Federal agencies,in collaboration with industry,academia,and partners and allies,must work together to accelerate the pace of innovation and translation through collabor

181、ative research,access to advanced infrastructure,and a culture of co-design across the microelectronics R&D enterprise.The past six decades have seen incredible progress in computational power and energy efficiency,enabled in part by continued miniaturization(supported by concomitant advances in mat

182、erials,design,metrology,and manufacturing).However,this trend in transistor scaling cannot continue indefinitely as the smallest device feature sizes approach the atomic scale.Furthermore,there are emerging applications that will require heterogeneous devices and materials.The semiconductor industry

183、 has therefore entered a period of rapid and profound change,and one in which performance advances can no longer be sustained solely by continued miniaturization of silicon-based devices.For example:The explosion of data and the emergence of artificial intelligence enabled by machine learning(ML)is

184、driving the development of“compute-in-memory”and other novel memory-intensive and memory-centric architectures that promise to overcome the“von Neumann bottleneck”the energy inefficiency and high latency caused by shuttling data back and forth between separate memory and compute elements.As intrachi

185、p and interchip data rates have increased,photonic interconnects,previously only used in long-haul links over optical fiber,are being integrated with electronics in advanced packaging to move data efficiently.Advances in materials and devices are enabling ultra-high-frequency free-space communicatio

186、n using mm-wave and THz systems.Advanced photonics are poised to deliver dedicated artificial intelligence/machine learning(AI/ML)hardware that operates at low power and extraordinary speed.31 Many aspects of microelectronics R&D intersect with other initiatives and Biden-Harris Administration prior

187、ities,including the National Nanotechnology Initiative,the Future Advanced Computing Ecosystem(formerly the National Strategic Computing Initiative),the National Quantum Initiative,and the Networking and Information Technology Research and Development(NITRD)Program.SML is working with all of these e

188、fforts to ensure synergy and coordination.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 12 Dramatic progress in scaling of microelectronic devices since the first digital computers This graph illustrates the change in the number of components on an integrated circuit,or chip,over time,along with so

189、me of the technological innovations that enabled the different waves of progress.For reference,the first programmable,electronic,general-purpose digital computer,ENIAC,built using vacuum tubes,is the first point in 1945.(See more about ENIAC in the call-out on p.4.)The first transistor,made from ger

190、manium,was invented in 1947 and was approximately 1 cm long.The first silicon transistor came a few years later.The first silicon integrated circuit was demonstrated in late 1959.With the invention of the first metal-oxide-semiconductor field effect transistor(MOSFET)integrated circuit in the early

191、1960s,the number of components began to increase exponentially.Each time progress slowed,advances in manufacturing science,materials,and device design re-energized the field.In the first wave,shrinking the size of the transistor,the basic building block of these chips,led directly to dramatic increa

192、ses in the number of components on a chip and dramatic reductions in the cost per transistorthe observation that formed the basis for Moores Law.The original planar integrated circuit went from small-scale integration(SSI)to medium-scale integration(MSI)to large-scale integration(LSI)to very large-s

193、cale integration(VLSI).During the second wave,the introduction of new materials,including the transition from aluminum to copper interconnects,resulted in better speed,power,and reliability,and enabled further reduction in transistor size.The third wave began with the transition from planar to three

194、 dimensional(3D)transistors using fin field-effect transistors(FinFETs),resulting in additional performance gains and continued miniaturization.As the technologies for shrinking the size of the transistors,which are now only a few atoms across,reach their physical limits,new strategies are required.

195、We are at the start of the“4th wave of microelectronics,”leaving behind device scaling and entering into an age where higher performance will be driven by innovations in the integration of heterogeneous technologies and 3D devices.While efforts continue to decrease transistor size,new tools,manufact

196、uring methods,and circuit architectures must be developed to deliver continued progress.Image credit:Defense Advanced Research Projects Agency(DARPA).NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 13 A revolution is underway in electronic design automation(EDA),including the application of AI/ML,clo

197、ud-based platforms,and design-technology co-optimization(DTCO)that will make it feasible for designers to create ever-more-complex integrated circuits,optimized for almost every conceivable application,faster and more reliably.These circuits will deliver tremendous gains in speed and efficiency and

198、affect the performance of every information technology sector,from data centers to edge computing and the internet of things(IoT).Heterogeneous and domain-specific computing architectures that optimize performance for specific applications are being deployed to accelerate time-to-solution.Microelect

199、romechanical systems(MEMS)are becoming increasingly sophisticated and powerful as they are integrated with processing and intelligence.Progress is being made in integrating semiconductor systems with biomolecular,biological,neuromorphic,and bio-inspired systems that may one day deliver unprecedented

200、 improvements in energy efficiency and other unique capabilities in computation,AI,robotics,sensing,and health care beyond the potential of either domain on its own.As the demands for different applications diverge,extreme reliability and operation at cryogenic temperatures,high temperatures,or low

201、power will modify the standard metrics of power,performance,area,and cost driving the development of new devices,architectures,and algorithms.As electronics move towards more heterogeneous architectures,performance metrics become more complex.Heterogeneous integrationthe science and technology of br

202、inging disparate materials,devices,and circuits together to create highly functional,high-performance systemsis key to enabling continued progress.However,as more and more diverse components are integrated,the physical,electronic,optical,and software challenges of making them operate seamlessly toge

203、ther become more complex.Dramatic increases in system heterogeneity and complexity also call for R&D attention on design flows that prioritize security and reliability,and that integrate both formal and empirical verification and validation throughout the full design,fabrication,and manufacturing pr

204、ocess.As referenced in the introduction,there are calls to not only support the underlying science and engineering that shape and drive microelectronics,including computer science,computing architectures,physics,chemistry,and materials science,but also to widely embrace the principles of integrated

205、design where these different aspects of research inform and guide each other synergistically,and with sustainable development in mind.Open communication between all levels of the stack is essential to ensure that end-use capabilities and requirements inform research,and that research breakthroughs a

206、re rapidly incorporated into development efforts.Such an integrated approach is the only way to guarantee that critical system attributes such as security,reliability,and radiation-hardness32 are designed in from the start and considered throughout the development cycle.Lastly,with the projected inc

207、rease in resources needed to produce,operate,and eventually recycle microelectronics systems,a comprehensive approach to estimating total lifetime energy consumption and cost will need input and expertise from across the entire supply chain to identify opportunities to develop more efficient archite

208、ctures and processes.32 Some space,energy,and defense applications require electronics that must function when subjected to a range of radiation sources,including cosmic rays.Radiation-hardened microelectronics perform critical sensing and computational functions so that these devices work as intend

209、ed in harsh environments.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 14 Integrated design Integrated design refers to a constant bidirectional flow of information from the top to the bottom of the stack driven by applications.Linking end-user needs to R&D is essential for rapid,focused technologi

210、cal development and deployment of research and development to the market.The figure at right illustrates this bidirectional flow of information among the various levels of the stack:material-to-circuit physical models;materials and processes;architectures,devices,and circuits;heterogeneous integrati

211、on and packaging;algorithms and software;and communications and networks.Future leadership in microelectronics requires industry to overcome significant challenges in device physics and fabrication.Deep innovation is therefore needed to identify and transition novel materials and devices from lab-to

212、-fab to enable continued advances in functionality and performance.Successful establishment of a lab-to-fab pathway will require renewed focus on the intersection between fundamental science and manufacturing technologies.Satisfying the ever-increasing demand for storage,bandwidth,and processing pow

213、er in information and computing technology(ICT)systems,along with the expected growth in the spectrum of applications beyond ICT,requires research and development from devices to systems,and from design to process technology.Central to this strategy is the need for access to design and fabrication f

214、acilities,including those equipped to incorporate unconventional materials and/or processes,often in heterogeneous combination with silicon(Si)-CMOS technologies.Innovations across all levels of the stack need to be fully exploited to enable further progress with complex scalable designs in leading-

215、edge Si-CMOS.Advances in characterization tools and techniques will also be needed to enable detailed and comprehensive investigations of new materials and designs,and to do so with unprecedented spatial resolution,sensitivity,bandwidth,and throughput.The increasing complexity of circuits and system

216、s,including those operating with signals in and interacting across multiple physical domains,will require complementary,multimodal metrology tools as well as new modeling and simulation capabilities to measure performance and provide the data necessary to support EDA,DTCO,and system technology co-op

217、timization(STCO).As the sophistication of these models grows,they will increasingly inform the development of manufacturing process improvements.In addition to coordination across the hardware-software stack,coordination is required across the R&D community through synergistic flow of research resul

218、ts to achieve the best outcomes.University and small-business researchers must have access to design tools,fabrication facilities,and related infrastructure in which to test their ideas.Commercial fabrication facilities will benefit from working with early-stage testers of novel technology approache

219、s.Likewise,industry R&D will benefit from the training of an advanced research workforce skilled in these areas and graduating from U.S.universities to join their corporate R&D efforts.An important aspect of this collaboration must be to establish and maintain effective research security measures to

220、 prevent R&D activities from creating unintended technology transfer.Over the next five years,U.S.government R&D efforts will focus on the following objectives:Material-to-Circuit Physical ModelsArchitectures,Devices&CircuitsMaterials&ProcessesHeterogeneous Integration&PackagingAlgorithms&SoftwareCo

221、mmunications&NetworksApplicationsImage credit:NIST.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 15 1.1:Accelerate the research and development of materials that provide new capabilities or functional enhancements.Materials R&D is central to meeting emerging needs across all sectors and application

222、 areas.New and improved materials are required to meet goals in energy efficiency,information speed and bandwidth,novel computing architecture,and sustainable development.For example,emerging substrate materials such as silicon carbide(SiC),indium phosphide(InP),aluminum nitride(AlN),or diamond are

223、under development.There are many promising new wide-bandgap,and ultra-wide-bandgap materials for applications in power electronics and radio-frequency electronics(6G and beyond),and while available,thin-film silicon nitride(SiN)and lithium niobate(LiNbO3)materials need to be improved to advance phot

224、onic applications and next-generation wireless communication.New multiferroic and memristive materials are expanding the range of functions that nanoelectronic devices can provide.However,despite these many exciting breakthroughs,the introduction of new materials into complex microelectronics proces

225、s flows typically takes decades of effort and billions of dollars to go from proof-of-concept to manufacturing.To enable novel and emerging materials to fulfil their potential,new approaches are needed to dramatically reduce the time and cost to deployment.Coordination among entities in the semicond

226、uctor materials and associated research ecosystem,including national labs,private sector companies,and consortia,will provide pathways to deployment of advanced materials for devices,interconnects,circuits,and systems.Frameworks like the Materials Innovation Infrastructure developed as part of the M

227、aterials Genome Initiative(MGI)33 can play an important role in organizing the materials community around grand challenges in developing new capabilities or functional enhancements for microelectronics.Elements of advanced materials R&D needed to support new capabilities include:Focused research on

228、emerging organic and inorganic materials including two-dimensional(2D)materials;materials exhibiting quantum effects/properties;wide-bandgap and ultra-wide-bandgap materials for energy-efficient electronics and use in extreme environments;materials optimized for high-bandwidth interconnects;material

229、s for ultra-high-frequency operation(optical,electrical,and electromechanical);materials that enable non-von Neumann architectures;and biotic-abiotic hybrid systems.Exploration of materials that can be seamlessly integrated into existing process flows,and that can,for example,add functionality into

230、the back-end-of-line(BEOL)to improve performance and allow for greater 3D integration.Increased efforts to improve existing bulk substrate materials and to accelerate the development and deployment of new ones.Unified semiconductor materials data infrastructure to facilitate knowledge sharing and ac

231、celerate innovation.New modeling,characterization,and metrology methods to allow the rapid,precise,and accurate determination of all of the parameters relevant to real-world applications.R&D efforts to accelerate the development of manufacturable synthesis processes and production-worthy tools for n

232、ew and emerging materials.New measurements and standards to ensure purity,physical properties,and provenance to accelerate materials research and development.34 33 NSTC Materials Genome Initiative Strategic Plan,2021,https:/www.mgi.gov/sites/default/files/documents/MGI-2021-Strategic-Plan.pdf 34 Str

233、ategic Opportunities for U.S.Semiconductor Manufacturing,NIST,2022,https:/nvlpubs.nist.gov/nistpubs/CHIPS/NIST.CHIPS.1000.pdf,p.6 NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 16 Research to improve sustainability and circularity(reuse,recycling)in processing,fabrication,and supply chains through t

234、he full lifecycle,including more eco-friendly materials and extraction processes,and wider use of earth-abundant elements that reduce supply-chain vulnerabilities.Access to fabrication facilities equipped to incorporate unconventional materials and/or processes,possibly in heterogeneous combination

235、with Si-CMOS technologies.Creation of new focused facilities to prove out and scale up processes for novel and unconventional materials.1.2:Increase the capabilities of circuit design,simulation,and emulation tools.Circuit design,simulation,and emulation tools applicable to new materials,devices,cir

236、cuits,and architectures are essential to continued innovation and device scaling.Strategic approaches to improve capabilities of digital tools include efforts to:Create,develop,and make widely available tools that can facilitate the design,modeling,simulation,and exploration of new forms of computin

237、g architectures and computing processorsboth digital and analog/mixed signal;support designs using advanced packaging;and incorporate objectives including size,weight,power,cost,safety,and security.Further the integration of AI and ML,together with physics-based methods,in EDA tools to support the d

238、esign and development of innovative circuit and system architectures.35 Develop high-level synthesis tools and EDA systems and flows,integrated with simulation and optimization capabilities,with shorter learning curves to lower barriers to entry for integrated circuit designers.Improve materials and

239、 device validation methods and advance measurements of material,component,and circuit properties,in order to generate robust,statistical parameters needed to increase the fidelity of EDA tools.Improve DTCO and STCO methodologies and platforms to enable full-stack co-optimization.Advance the developm

240、ent of formal and end-to-end validation methods,including device-relevant materials data and input information,to overcome bottlenecks in circuit and system design and simulation to manage increasingly complex and heterogeneous systems.1.3:Develop a diverse array of robust processing architectures a

241、nd associated hardware needed for future systems.The rapid growth and utilization of advanced computing resources for machine learning,augmented reality/virtual reality(AR/VR),image/signal processing,etc.,have created performance and energy demands that are pushing the boundaries of state-of-the-art

242、 Si-CMOS designs.Non-von Neumann computing architectures,such as neuromorphic,memory-centric,deep learning,asynchronous 35 NSF Workshop on Micro/Nano Circuits and Systems Design and Design Automation:Challenges and Opportunities,University of Notre Dame,2021,https:/nsfedaworkshop.nd.edu/assets/43228

243、9/nsf20_eda_workshop_report.pdf Silicon wafers being loaded into a low-pressure chemical vapor deposition(LPCVD)furnace.Image credit:NIST.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 17 computing,hybrid,and designs harnessing quantum effects,will be increasingly useful in a wide range of commercia

244、l and national security applications.In addition to systems based on standard Si-CMOS,new approaches employing cryogenic CMOS,analog/mixed-signal technologies,photonics,spintronics,and quantum devices are rapidly emerging.Making the most of this diverse array of processing architectures and device t

245、ypes requires innovations across the entire stack.Key research and development needs include development of:Increased understanding of the algorithms,programming models,and compilers required for optimal performance of these architectures.Hardware,software,and standards-focused efforts to enhance de

246、vice programmability and programmability abstraction.Manufacturing and design capabilities optimized to produce these novel processing architectures.Novel architectures in addition to new integrated circuit designs that enable the optimal integration of non-von Neumann components with traditional co

247、mputing architectures.AI and ML approaches to address the challenges associated with the expected high data rates and large data volumes generated by heterogeneously integrated logic-memory devices.Quantum information science research,including quantum computing,quantum networking,and quantum sensin

248、g,which will demand a wide range of new systems design approaches in addition to advanced fabrication capabilities and exotic materials.36 Quantum support technologies,such as cryogenic electronics and photonics,to interface with quantum systems.Energy-efficient processing architectures for large ne

249、tworks of sensors to extract and distill information,including sensor technologies,analog processing architectures,and extreme distributed edge computing using both classical and bio-inspired approaches.Design flows and architectures for sensing,signal processing,and computing applications in extrem

250、e environments.Circuit innovations beyond high-performance computing to address needs in energy,health care,transportation,and communications.1.4:Develop processes and metrology for advanced packaging and heterogeneous integration.Heterogeneous integration,which includes the integration of several d

251、istinct technologies(e.g.,Si-CMOS,MEMS,III-V mixed signal,and photonics)that are themselves the result of integrating multiple systems,will be a critical driver of future innovation in microelectronics.Examples can include integration on single chips,multiple chips,or chiplets37 on substrates,using

252、a variety of approaches,such as 2.5D and 3D stacking,high-density redistribution,optical packaging and test,fan-out,hybrid bonding,advanced interposers,high-density solder bumps,copper interconnects,and vias.Success in heterogeneous integration leads to better yields,lower costs,greater functionalit

253、y,re-use of IP enabling accelerated design iterations and customization,and improved energy efficiency.Integration is critical across application spaces that range from high-performance computing to health care to positioning,navigation,and timing.Heterogeneous integration and the advanced packaging

254、 technologies that make it possible are now growing faster than traditional packaging.This growth 36 Coordinated under the National Quantum Initiative,see https:/www.quantum.gov.37 The term“chiplet”refers to an integrated circuit unit with a specific purpose or function that can be combined with oth

255、er units(chiplets)in a modular approach to design systems.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 18 presents the United States with a rare opportunity to establish a lead in a critical area,despite the dominance of overseas assembly and test facilities in conventional packaging.Successfully

256、securing U.S.leadership in advanced packaging and reaping the benefits of heterogeneous integration will require addressing many interlinked research challenges,including materials,manufacturing processes,energy,cost,yield,and validated modeling.Key research challenges include:New materials for subs

257、trates,encapsulation/molding,and die-to-die interconnects to expand the available design space,and for which collaboration and partnerships with materials suppliers will be essential.Advances in areas such as mechatronics,machine vision,and robotics to support the development of cost-effective,autom

258、ated,agile systems for both high-volume and high-mix packaging and assembly.Innovative interconnect technologies to increase energy efficiency and density.New,high-speed methods to inspect components prior to assembly and to monitor interfaces during assembly to reduce defective components or defect

259、s in interfaces between components.Enhanced tool metrology and inspection capabilities,including novel optical sources and high-speed detectors over wavelengths from infrared to x-ray.New metrology that spans multiple length scales(2D and 3D)and physical properties to address unique measurement chal

260、lenges imposed by emerging heterogeneous integration and advanced packaging processes and technologies.Improved physics-based modeling of the thermal,mechanical,and electromagnetic behavior of the complete system and development of new,high-resolution methods to measure these behaviors to validate m

261、odel accuracy and system performance.Integrated design tools and methods to ensure that circuits,architectures,and packages are co-designed to maximize system performance and IP re-use.1.5:Prioritize hardware integrity and security as an element in co-design strategies across the stack.In the face o

262、f threats from nation-state and criminal adversaries,the potential for the insertion of malicious alterations into components ranging from circuits to software,combined with the need to prepare for encryption and data security in a post-quantum-computing world,make it essential that integrity and cy

263、bersecurity be a foundational component of system design.38,39 There are many attack 38 Cybersecurity R&D challenges and goals for hardware and software are described in Federal Cybersecurity Research and Development Strategic Plan,OSTP,2023,https:/www.whitehouse.gov/ostp/news-updates/2023/12/31/fed

264、eral-cybersecurity-research-and-development-strategic-plan/.39 https:/www.whitehouse.gov/briefing-room/statements-releases/2022/05/04/national-security-memorandum-on-promoting-united-states-leadership-in-quantum-computing-while-mitigating-risks-to-vulnerable-cryptographic-systems/Integrated photonic

265、 devices in a probe station undergoing simultaneous optical and electronic measurement.Image credit:NIST.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 19 vectors that must be mitigated,including side-channel,reverse-engineering,malicious hardware,and supply-chain manipulation.In recent years,cybers

266、ecurity threats have evolved from attacks focused high in the software stack to progressively lower levels of the computational hierarchy,down to the chip level.In addition to improving security,advances are needed across the stack to support enhanced privacythe ability of individuals and organizati

267、ons to control who has access to and control over their data and to what extent their data can be associated with them.Co-design of hardware with software is needed to meet these challenges in ways that provide maximum protection while minimizing the impact on system performance.40 The design proces

268、s must allow for iteration between hardware,software,and security/privacy constraints.To meet economic and national security needs,as well as maintain privacy,security must be incorporated in co-design R&D as a constraint,and it must be assigned the same priority as power,performance,area,and cost.R

269、esearch needs to improve hardware integrity and security include development of:Accurate threat models to support the analysis of the cost-benefit tradeoffs of different security approaches.High-level conceptual models of integrity and security(analogous to abstraction layers in computer science)to

270、help the various disciplines in the co-design community communicate and collaborate more effectively.New automation and support structures to enable applications to be built on secure systems and to support the universal adoption of new applications.Co-design centers of excellence,in which security

271、is a primary design constraint within each of the hardware focus areas.New methods to protect data and reduce the need to trust hardware,such as homomorphic encryption,encrypted memory systems,secure computation,sequestered encryption,and multi-party computation.Methods to ensure the provenance and

272、integrity of integrated circuit IP.Standard test articles,methods,and analysis for evaluating and benchmarking measurement performance to promote measurement reproducibility between different organizations.41 High-throughput measurement and inspection systems to enable verification of circuit hardwa

273、re.1.6:Invest in R&D for manufacturing tools and processes needed to support transition of innovations into production-worthy fabrication processes.As R&D delivers new materials and devices,research is required to also develop the manufacturing tools and processes to enable the mass production of th

274、ese new technologies.While important manufacturing technology advances will continue at micrometer scales,much that is cutting edge is already and will continue to be at the nanometer scaleeven at the atomic scale for some features.To meet the demand for enhanced device performance and energy effici

275、ency,the corresponding development of manufacturing processes,tools,and metrology with unprecedented precision is required.So-called“ultra-precision manufacturing”(UPM)is the next step in a long history of manufacturing at ever-smaller scales.42 The need for ultra-precision also presents an opportun

276、ity to take advantage of material properties that are unique to the nanometer scale,such as tunneling or 40 See,for example,D.Dangwai et al.,SoK:Opportunities for Software-Hardware-Security Codesign for Next Generation Secure Computing,2021,https:/arxiv.org/abs/2105.00378.41 5G Hardware Supply Chain

277、 Security Through Physical Measurements,NIST,2022,https:/doi.org/10.6028/NIST.SP.1278 42 See for example,N.Taniguchi,Current status in,and future trends of,ultraprecision machining and ultrafine materials processing,CIRP Annals,32(2)(1983):573582,https:/doi.org/10.1016/S0007-8506(07)60185-1.NATIONAL

278、 STRATEGY ON MICROELECTRONICS RESEARCH 20 magnetic and spin interactions,to realize powerful new functionalities.Novel fabrication methods will be effective only if they can be scaled to achieve commercial volumes.Advanced manufacturing R&D to scale up processes and tools to meet the demands of manu

279、facturing is therefore essential.43 Conversely,there are also opportunities to develop more agile manufacturing approaches that enable cost-effective,high-mix,low-volume production to support increasingly diverse commercial and defense needs.In addition,there are significant opportunities to advance

280、 manufacturing technology at larger feature sizes to improve yields,reduce process and device variation,and enable cost-competitive,resource-efficient domestic manufacturing.Key R&D needs for new tools and processes include:Ultra-precision characterization,advanced lithography,and metrology tools,al

281、ongside improved quality control,including accurate reference structures at the sub-10-nm scale.Novel approaches to patterning,both subtractive and additive,that support emerging needs such as 3D architectures,large-area substrates,and high-mix,low-volume manufacturing of circuits and packages.Impro

282、vements in processes such as area-selective atomic-layer deposition and etching to support reduced feature sizes and more complex device geometries.High-throughput experimentation and modelling methods,coupled with new capabilities in optical,electron,and scanning probe microscopy inspection tools t

283、o improve speed,throughput,yield,precision,and accuracy.Hybrid metrology methods that combine data from multiple measurement tools integrated with new ML methods to utilize the data and enable process optimization.Integrated AI/ML/physics-based models capable of digesting a fabs worth of real-time p

284、rocess data for advanced predictive analytics to measure and improve yield and enable fab virtualization in semiconductor and microelectronics manufacturing.Further development and use of in situ metrology to accelerate the integration of real-time process control and reduce process variabilitya key

285、 driver of costly ex situ metrology.Progress in this area requires advances in the integration of multimodal measurements,software integration,and tool development.Rapid,high-resolution,non-destructive techniques for characterizing defects and impurities and correlating them with performance and rel

286、iability.Physical properties characterization for surfaces,buried features,interfaces,and devices with increased resolution,sensitivity,accuracy,and throughput.Application of first-principles materials research with high-performance computing to develop accurate materials-process interaction models.

287、Advances in the application of digital twins to enable the accurate modeling and rapid iteration and convergence of manufacturing process flows.Improvements in energy and resource efficiency,and use of environmentally benign chemistry44 in manufacturing processes.43 DOE Workshop report on Ultra-prec

288、ise control for ultra-efficient devices:https:/www.energy.gov/sites/default/files/2022-02/AMO%20Semiconductor%20Workshop%20II%20Report%20FINAL_compliant_02-08-2022.pdf 44 https:/www.whitehouse.gov/wp-content/uploads/2023/08/NSTC-JCEIPH-SCST-Sustainable-Chemistry-Federal-Landscape-Report-to-Congress.

289、pdf NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 21 Goal 2.Support,Build,and Bridge Microelectronics Infrastructure from Research to Manufacturing As emphasized throughout this strategy,microelectronics R&D is extremely infrastructure-intensive,and access to the appropriate facilities and associat

290、ed expertise is necessary at every development stagefrom early-stage research through manufacturing.Furthermore,the resources for each stage must be connected to ensure that new innovations can rapidly progress along the technology development pathway.Historically,the United States has not had centr

291、alized,open-access facilities for microelectronics R&D that are equipped with the design and fabrication tools,testing,and expertise relevant to a manufacturing environment for leading-edge technologies,limiting opportunities for researchers to advance their innovations.Recognizing this gap in the e

292、cosystem,Congress authorized and appropriated resources for several programs in the CHIPS Acts to help establish facilities that support domestic research maturation and access to advanced prototyping capabilities using manufacturing-relevant equipment.Additionally,the continued diversification of m

293、icroelectronics to best address specific use cases results in a complex set of needs across the various R&D stakeholders.Researchers require straightforward access to facilities in the United States equipped with fabrication tools,testing capabilities,and skilled technicians to maintain and operate

294、them.This infrastructure support empowers researchers to demonstrate the potential of new devices,interconnects,circuits,systems,and fabrication processes in a leading-edge(or near-leading-edge)manufacturing environment.A well-coordinated constellation of facilities with state-of-the-art equipment,d

295、esign tools,and skilled technicians will also be essential for advancing leadership in heterogeneous integration.The semiconductor R&D infrastructure exists across a continuum,supporting activities ranging from the exploration of new materials to the implementation of new system architectures.The in

296、credible complexity of modern semiconductor and microelectronic systems is best managed by enabling each level in the stack to judiciously abstract and inform the key features of neighboring levels as part of a co-design approach with bidirectional information flows.Material characteristics are abst

297、racted into device models,device behaviors are incorporated into circuit models,circuits into architectures,and so on up to applications.Likewise,application and software characteristics inform architectures,which guide circuit designs and so on down the stack.As the R&D focus moves up the stack,the

298、 infrastructure must be aligned to ensure a continuous path for scientific and technological developments made at each level to inform those at the next,and ultimately to feed into commercial design and manufacturing.At the lowest level of the stack,maximum flexibility is required of facilities to a

299、ccelerate the research and development of new materials that will enable breakthrough performance.As these materials are identified,they must be made available to the research community to integrate into devices to determine whether the anticipated performance benefits can be realized.Further up the

300、 stack,facility flexibility is less important compared to the existence of reliable and robust fabrication processes that enable repeatable and reliable measurements of device performance.At the circuit level,access to documented and supported process design kit(PDK)modules and foundational circuit

301、IP,e.g.,standard cell libraries,complemented by robust testing and characterization capabilities,are essential.At the package level,adaptable integration and characterization of monolithic and system-in-package designs,including advanced chiplet capabilities,are needed to support small-and medium-sc

302、ale prototyping.Creating such a full-spectrum R&D ecosystem will require supporting and expanding cost-effective access to the infrastructure needed for innovation.This infrastructure comprises three critical components:hardware and software tools,data and data sharing infrastructure,and expertise t

303、o make NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 22 the best use of the tools and data.Affordable and timely access to these tools and data is also an essential prerequisite for training and maintaining the expertise of the research and manufacturing workforce.The infrastructure needed to suppo

304、rt the R&D continuum ranges from facilities for the early-stage development of materials,structures,devices,fabrication processes,and metrology and characterization tools,to access to leading-edge prototyping facilities using standardized processes.The CHIPS Acts investments are intended to bridge t

305、he gap between early-stage R&D and prototype,enabling experimentation with new materials,processes,and metrology.Collaboration mechanisms across departments and agencies are needed to facilitate the transition of work from one facility to the next as users technologies mature and capabilities evolve

306、.It is important to note that while several programs are highlighted under the following objectives in support of the microelectronics research infrastructure(goal 2),they also play a critical role in advancing research to help secure technical leadership(goal 1),educating and training the future wo

307、rkforce(goal 3),and helping to connect the broader ecosystem(goal 4).Federal efforts over the next five years will address the following objectives:2.1:Support federated networks of device-scale R&D fabrication and characterization user facilities.The support of new concepts for electronic,photonic,

308、and micromechanical devices that advance both“More-Moore”and“More-Than-Moore”solutions45 requires increasingly complex and costly characterization and fabrication tools and facilities.Semiconductor materials synthesis and characterization,and device fabrication and measurement,involve multiple steps

309、 using different tool sets.Researchers working in microelectronics need access to user facilities equipped with complete suites of fabrication and characterization tools that require constant capital investments to remain current.In addition to the instrumentation,effective user facilities require e

310、xpert staff to maximize the operation of specialized tools,and to train new users,which helps lower the barrier to access and provides an important role in education and workforce development.Fortunately,the microelectronics R&D community can build upon the foundation of existing facilities,includin

311、g the user facilities established as part of the NNI.46 User facilities and other shared research infrastructure located across the country provide access to advanced laboratories,equipment,and expertise to researchers from government,industry,and academia.Supported by multiple federal agencies,many

312、 of these infrastructure centers facilitate microelectronics-relevant R&D by providing access to clean rooms,characterization tools,materials science and synthesis laboratories,and modeling and simulation tools.In addition to providing access for research activities,these centers also serve as a pow

313、erful training and workforce development engine.For example,the NSF-funded National Nanotechnology Coordinated Infrastructure(NNCI)is a network of 16 sites across the country that involves 29 universities and other partner organizations and provides access to user facilities with fabrication and cha

314、racterization tools.In addition to providing researchers from government,industry,and academia with access to over 2,200 individual tools in 71 distinct facilities,the NNCI network 45 More-Moore refers to advances in CMOS transistor scaling,and More-than-Moore refers to incorporating devices with fu

315、nctionality that does not necessarily scale like Moores Law,such as radio-frequency,photonic,and MEMS devices.46 These facilities include the NSF-funded National Nanotechnology Coordinated Infrastructure,based in universities across the country,the DOE Nanoscale Science Research Centers,co-located w

316、ith other facilities in DOE National Laboratories,and the DOC/NIST Center for Nanoscale Science and Technology NanoFab and facilities being set up in support of the National Quantum Initiative,including the DOE National QIS Centers and NSF Q-AMASE program.NATIONAL STRATEGY ON MICROELECTRONICS RESEAR

317、CH 23 supports expert staff to assist researchers,and a suite of education,training,and outreach efforts.As the fourth iteration of NSFs user facilities focused largely on nanoelectronics,these facilities have serviced tens of thousands of researchers and helped train generations of students.Further

318、more,access to the costly specialized equipment necessary for microelectronics research provides opportunities for students,faculty,and researchers from institutions or small businesses unable to purchase and house similar facilities on site,broadening participation and expanding the research commun

319、ity.In addition to the NNCI and other major university centers,the U.S.government provides access to National Laboratory facilities through DOEs five Nanoscale Science Research Centers(NSRCs)and the NIST Center for Nanoscale Science and Technology(CNST)NanoFab.The five NSRCs are DOEs premier user ce

320、nters for interdisciplinary research at the nanoscale,serving as the basis for a national program that encompasses new science,new tools,and new computing capabilities.These laboratories contain clean rooms,nanofabrication resources,one-of-a-kind signature instruments,and other instruments not gener

321、ally available except at major user facilities.The NIST NanoFab provides access to an extensive commercial,state-of-the-art tool set,including advanced capabilities for lithography,thin-film deposition,and nanostructure characterization,and a full-time technical support staff.Finally,other shared in

322、frastructure such as characterization laboratories,computational and modeling resources,light and neutron sources,and manufacturing institutes have a role to play in developing future materials,processes,designs,standards,and workforce.Key needs for the R&D fabrication and characterization facilitie

323、s include:A gap analysis of current facilities followed by efforts to address capability gaps within existing facilities and establish new capabilities where needed to comprehensively address the needs of different areas and levels in the stack.A regularly updated searchable public registry of share

324、d research resources that enables researchers to easily identify the programs and centers that best align with their needs.Support for advanced manufacturing technologies capable of incorporating emerging low-dimensional nanomaterials and nanodevices and other“More-Than-Moore”solutions into designs,

325、along with circuits manufactured using mature and state-of-the-art techniques for both small-and medium-scale prototyping.Agreements with international entities in allied and partner countries as necessary to provide U.S.-based researchers with access to cutting-edge manufacturing facilities to brid

326、ge current domestic gaps.Funding models,using impact metrics primarily focused on meeting the needs of a broad and diverse user base,that enable facilities to acquire sufficient state-of-the-art tools to build critical mass in their focus area(s),support expert facility technical staff to guide and

327、assist users,and afford ongoing recapitalization as needed to maintain both state-of-the-art and state-of-the-practice capabilities.Success metrics and funding mechanisms that incentivize training and education,including support for travel to centers for researchers who are in geographically disadva

328、ntaged locations.Reduced barriers to facility access including through outreach to the research community,affordable operating costs/fees,and simple,equitable access models,including improved Researchers using an electron microscope.Image credit:NIST.NATIONAL STRATEGY ON MICROELECTRONICS RESEARCH 24

329、 implementation of remote operation technologies to further extend the geographic reach of every facility and promote equity of access.FAIR(findable,accessible,interoperable,and reusable)data management systems to maximize access by the research community to information generated in the facilities.2

330、.2:Improve access for the academic and small-business research community to flexible design tools and wafer-scale fabrication resources.Currently,the costs of design tools,notably PDKs,assembly design kits(ADKs),and EDA,combined with the costs of foundry fabrication runs,can be prohibitive for small

331、-business and academic research communities,as well as for efforts at government facilities,DOE National Laboratories and other FFRDCs,and nonprofit laboratories.In addition,there is no well-established pathway for a wafer fabricated at a foundry,particularly at mid-flow,to be further processed in a

332、 more flexible research facility.The CHIPS Acts investments will help address this domestic gap between device-scale R&D and advanced prototyping,through investments in infrastructure complemented by new public-private partnerships.These efforts aim to provide efficient,affordable access to a networ

333、k of shared resources for wafer-scale R&D,and to develop a chiplet R&D ecosystem.Key needs to improve access to design tools and fabrication resources include:Flexible and affordable models,including potential open-sourcing capabilities for mature nodes,that expand the availability of advanced PDKs,standard cell libraries,and certain IP(i.e.,memory controllers,cores,etc.)for domestic researchers w