1、ISSCC 2024SESSION 1Plenary 2024 IEEE International Solid-State Circuits Conference1Roger LuoPresidentTSMC ChinaSemiconductor Industry:Present&FutureDr.Kevin ZhangSenior Vice President,Business Development and Overseas Operations OfficeTSMCUnleash Innovation 2024 IEEE International Solid-State Circui

2、ts Conference 2024 IEEE International Solid-State Circuits Conference2Life Runs on Semiconductors 2024 IEEE International Solid-State Circuits Conference3-200 400 600 800 1,0000201020202030Worldwide Semiconductor Revenue(Billion USD)Source:TSMCSemiconductor Industry Outlook(FCST)2024 IEEE

3、 International Solid-State Circuits Conference42030 Semiconductor Market by PlatformHPCMobileAutomotiveIoTOthers40%30%15%10%5%2024 IEEE International Solid-State Circuits Conference 2024 IEEE International Solid-State Circuits Conference5Generative AI Significantly Accelerates Computing NeedsNormali

4、zed Compute Requirement LLM Parameters(B)0.17.5761751,000Source:OpenAI,NVIDIAe.g.,BERT-LargeLanguage Modele.g.,GPT-2/Megatron-LMNatural Languagee.g.,Turing-NLG/GPT-3Natural Languagee.g.,GPT3/3.5 ChatGPT e.g.,Megatron-TuringNLG/GPT-41X10,000X 2024 IEEE International Solid-State Circuits Conference6Wi

5、reless Communication:Pervasive Connected Intelligence200Gbps 1000msWi-Fi 4Wi-Fi 5Wi-Fi 6Wi-Fi 7Wi-Fi 8 Wi-FiBT 2.xBT 3.0 BT 5.xBT 6.xBT 1.xBT 4.x BluetoothData Rate:1Mbps Classic+HSLow Energy1Mbps 75%Power Reduction50Mbps2Mbps10Gbps 5.7Gbps 2024 IEEE International Solid-State Circuits Conference7 20

6、24 IEEE International Solid-State Circuits ConferenceAutomotive:Toward Smarter,Safer,GreenerCameraLidarRadarZonal GatewayZonal GatewayZonal GatewayZonal GatewayCentral Compute 2024 IEEE International Solid-State Circuits Conference8Semiconductor FoundryThe founding of pure-play foundry pioneered the

7、 entire fabless industry,enabled and accelerated the innovation and adoption of semiconductor technologies IEEE Medal of Honor(2011)2024 IEEE International Solid-State Circuits Conference9Foundry Business Model Innovation*Integrated Device ManufacturerIDM*TechnologyDevelopmentWaferManufacturingProdu

8、ctSalesIC DesignFablessProductSalesIC DesignFoundryTechnologyDevelopmentWaferManufacturing 2024 IEEE International Solid-State Circuits Conference1019871990$51B2010$311B2030(FCST)$1T55%22%23%FablessMemoryIDM*75%23%2%FablessMemoryIDM*IDM excluding memorySystemFablessMemoryIDM*30%20%40%10%10%40%Fables

9、sSystemFoundry Enables Fabless and System Company Growth 2024 IEEE International Solid-State Circuits Conference11Advanced Technology Scaling 2024 IEEE International Solid-State Circuits Conference 2024 IEEE International Solid-State Circuits Conference01420162018Logic Density 20202022202

10、42026N3PN2N16N10N7N6N5N4N3EN22N28Process Technology EvolutionDevice ArchitectureNanosheetLow-R MEOL/BEOLSelf-Aligned FeaturesLow K SpacerFinFlex with 1-FinHigh Mobility Channel Super High Density MIMFinFETEnhanced Strained-SiHigh Density MIMHigh-KMetal GatePlanarLithographyEUVEUVDouble Patterning Im

11、mersionSingle Patterning DoulePatterning Self Aligned Double Patterning Immersion 2024 IEEE International Solid-State Circuits Conference13Transistor Architecture OutlookPower,Performance,Area(PPA)Year*TMD:Transition Metal Dichalcogenides2D TMD*Beyond SiCNTSourceGateDrainSourceSourceGateDrainSourceS

12、ourceGateDrainSourceDevice ArchitectureFinFETNanosheetCFET 2024 IEEE International Solid-State Circuits Conference14CFET Density ScalingSRAMInterconnectTopNMOSBottom PMOSNMOSPMOSInverterTopNMOSBottom PMOSNMOSPMOSDensity scaling 1.5-2X 2024 IEEE International Solid-State Circuits Conference15CFET Sil

13、icon DemonstrationDemonstrated the Integration ofnFET and pFETnFETpFET1E-021E-031E-041E-051E-061E-071E-081E-09-0.8-0.6-0.4-0.200.20.40.60.8Vgs(V)Id(A/um)Vd,lin=0.05VVd,sat=0.75VTop nFETBottom pFET2023 IEDMWednesday,Dec.13|9:00 AM 12:00 PM11:35 AM 12:00 PMProgram Number:29-6Complementary Field-Effect

14、 Transistor(CFET)Demonstration at 48nm Gate Pitch for Future Logic Technology ScalingS.Liao,Taiwan Semiconductor Manufacturing Company(TSMC);L.Yang,Taiwan Semiconductor Manufacturing Company(TSMC)2024 IEEE International Solid-State Circuits Conference16DTCO for Standard Cell OptimizationCell Size Op

15、timizationGate ContactOver STIGate Contact Over ActiveCell Abutment OptimizationDouble Diffusion BreakContinuous DiffusionSingle Diffusion BreakCell Height Optimization3-Fin3-Fin2-Fin2-Fin2-Fin1-FinP-FinN-FinPolyContactFin Depopulation-Design-Technology Co-Optimization Innovation 2024 IEEE Internati

16、onal Solid-State Circuits Conference17SRAM Bit Cell Area Reduced by 100X with Extensive DTCO0.010.020022004200620082000222024Bit Cell Area(mm2)90nm65nm45nm130nm28nm20nm16nm10nm7nm5nm3nmTall cell Wide cellHigh Current/High Density cellsStrained SiliconHigh-K Metal Gat

17、eTechnologyDouble patterningM0 Bid-LineFinFETEUV and high mobility channelDesignColor aware design and design assistWrite assist for FinFETNovel Dual Rail SchemeFLY BL Double World LineMetal coupling Negative Bid-LineCompact Periphery Layout(FCST)2024 IEEE International Solid-State Circuits Conferen

18、ce18Negative Bitline Write-Assist Technique Lowers VMINof 3nm HD SRAM by 300mVHD SRAM VMIN(a.u.)Percent.1.0708090959999.999.99VMINwithout assistVMINwith assistVMINspec.300mVSource:J.Chang,et al.,“A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture andWrite-Assist Cir

19、cuitry Scheme for High-Density and Low-VMIN Applications,”VLSI Symposium on Technology and Circuits,2023.2024 IEEE International Solid-State Circuits Conference19Technology Advancement Enables Energy Efficient ComputeN28N16N10N7N5N3Perf/Watt/mm2Source:TSMC 2024 IEEE International Solid-State Circuit

20、s Conference20Technologies for HPC and AI 2024 IEEE International Solid-State Circuits Conference 2024 IEEE International Solid-State Circuits Conference21TODAYTechnology Platform for HPC/AI 2024 IEEE International Solid-State Circuits Conference22SubstrateSoCMemoryvvLSIvvSi PhotonicsIVRIVReDTCFiber

21、Chip 2Chip 1Chip 2Chip 3Technology Platform for HPC/AIRDL Interposer+LSI*+eDTC*High Performance Memory3D Stacking/SoICCo-Packaged OpticsIntegrated VoltageRegulator6X Interposer*:LSI:Local Silicon Interconnect;eDTC:embedded Deep Trench CapacitorTOMORROW 2024 IEEE International Solid-State Circuits Co

22、nference23YearInterconnect Density(#/mm2)Source:TSMC1.E+061.E+051.E+041.E+031.E+021.E+011.E+00Flip ChipSubstrateSoCAdvanced Packaging Technologies Enable Interconnect Density ScalingCoWoSSoCHBMHBMSubstrate3D Stacking/SoICChip 2Chip 1Chip 2Chip 3SoCPI*AI RDL*AI RDL*:PI:Polyimide;AI RDL:Aluminum Redis

23、tribution Layer 2024 IEEE International Solid-State Circuits Conference24Silicon Photonics is Best Option for Co-Packaged Optics(CPO)Cable(Cu)0.04Tbs100mmCu cable51T Switch System Power2400WPluggable(IIIV)1.6Tbs100mmFiber1500WCPO(Silicon Photonics)Switch6.4Tbs CPO tile10 mmFiberEE:Electrical EngineO

24、E:Optical Engine850W 2024 IEEE International Solid-State Circuits Conference25Innovation Beyond Chip Level is a Must200 MOS TransistorsCu/Low-KSiGeImmersionHKMG2000cores7B 3000 Cores(16FF)15B TRANSISTORSA Few TransistorsLow-R BarrierELK2P2E3D FinFETCo Cap/LinerSelf-Aligned Line with Flexible SpaceMe

25、tal Oxide ESLEUVNew Channel MaterialsLow Damage/Hardening Low-K&Novel Cu FillHeterogeneous IntegrationLogic150BLogicTRANSISTORSEnabled by 3D Silicon Stacking and Advanced PackagingTechnologiesTimePerformanceSource:TSMC 2024 IEEE International Solid-State Circuits Conference26Cellular RF 2024 IEEE In

26、ternational Solid-State Circuits Conference 2024 IEEE International Solid-State Circuits Conference275G Evolution Driving System Architecture Renovation and Technology MigrationMore complex interfaces due to more supporting bands in 5GReducing interface lines 84x 14x by adopting Serdes4GN16N28DACADC

27、Analog Signal(LTE BW20)BB/AP*bufferRFSource:30 M.-D.Tsai,et al.,ISSCC,2020;31 C.-C.Tang,et al.,ISSCC 2019 5GN16N7/N5Digital Signal35GbpsSerdesBB/AP*SerdesDACADCRF*:BB:Baseband;AP:Application Processor 2024 IEEE International Solid-State Circuits Conference28Automotive 2024 IEEE International Solid-S

28、tate Circuits Conference 2024 IEEE International Solid-State Circuits Conference29ADAS Drives Adoption of Leading Edge TechnologyPerformance Log(TOPS)Power Log(W)Datapoint based on published datasheet of ADAS products L2+to L55 3nmL2 to L2+/L3 28 16 7nmMCUFPGAVPU1 TOPS/Watt510 TOPS/Watt 2024 IEEE In

29、ternational Solid-State Circuits Conference30Advanced Logic Technology DPPM for AutomotiveTechnology Mass Production(MP)Timeline by QuarterNormalized DPPM(Defective Parts Per Million)3Q2Q1QMP+1Q+2Q+3Q+4Q+5Q+6QCriteria for Automotive Offering3nm7nm5nmSource:TSMCCollaboration between product design an

30、d foundry to meet automotive DPPM target through dynamic voltage stress,fast yield learning and physical FA 2024 IEEE International Solid-State Circuits Conference31MRAM/RRAM Technology for Auto MCUBit CountsCell Current(A)After 1M cycleAfter 1M cycle and 10 years 150C16nm MRAM robust reliabilitySou

31、rce:TSMCRRAM Data 250KC,2MbCurrent(A)Bit Error Rate(ppm)Addressedby 2cell/bitSpec.T1000T0 2024 IEEE International Solid-State Circuits Conference32MRAM/RRAM Bitcell ScalingContinue expending technology envelope toward N5/N4 nodesCell Size(um2)N28/N22N16/N12N7/N6N5/N5ESF30.0430.046MRAMRRAM0.042Source

32、:TSMC 2024 IEEE International Solid-State Circuits Conference33 2024 IEEE International Solid-State Circuits ConferenceTechnologies for Sensors and Display 2024 IEEE International Solid-State Circuits Conference34Number of Photos Taken Per YearYearBillions of Photos2000201020152025 20230S

33、ource:https:/ IEEE International Solid-State Circuits Conference35CMOS Image Sensor(CIS)EvolutionBackside illuminated CISCIS StackedWith Integrated ISP3 Wafer StackedTwo-Layer CIS+ISP(New Integrations)PhotodiodeWafer1/wafer2 interfaceWafer2/wafer3 interface 2024 IEEE International Solid-State Circui

34、ts Conference361-Layer Pixel2-Layer PixelSingle Layer Pixel vs.2-Layer PixelTop WaferBottom Wafer 2024 IEEE International Solid-State Circuits Conference37New Integration of VDGS CMOS Image Sensor(CIS)DummyareaDummyareaReadout&ProcessingSensorStorage2 Wafers StackedReadout&ProcessingStorageSensor3 W

35、afers Stacked 2024 IEEE International Solid-State Circuits Conference38GDP$145TIT$12TEE$3TSC$1TFoundry$0.25TSource:TSMC Estimate2030Semiconductor:The Enabler to Power Global Economy 2024 IEEE International Solid-State Circuits ConferenceBram NautaUniversity of Twente,Enschede,The NetherlandsRACING D

36、OWN THE SLOPES OF MOORES LAW 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLin2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinTransistor cou

37、nt2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinProcessor clock speedTransistor count2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200

38、565nm22nm“3nm”“0.5nm”10,000nmLogLinProcessor clock speedDigital block energyTransistor count2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinProcessor clock speedDigital block energyTransistor countCha

39、nnel length2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinfmaxProcessor clock speedDigital block energyTransistor countChannel length2A keynote needs a slide on Moores law 2024 IEEE International Sol

40、id-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinfmaxProcessor clock speedDigital block energyTransistor countChannel lengthmetals2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,

41、000nmLogLinfmaxProcessor clock speedDigital block energyTransistor countChannel lengthfmaxmetals2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinfmaxProcessor clock speedDigital block energyTransistor

42、countChannel lengthfmaxmetals2A keynote needs a slide on Moores law 2024 IEEE International Solid-State Circuits Conference72012200565nm22nm“3nm”“0.5nm”10,000nmLogLinfmaxProcessor clock speedDigital block energyTransistor countChannel lengthfmaxmetals?2A keynote needs a slide on Moores la

43、w 2024 IEEE International Solid-State Circuits Conference3 2024 IEEE International Solid-State Circuits Conference3 2024 IEEE International Solid-State Circuits Conference3 5 nm 2024 IEEE International Solid-State Circuits Conference5%3 5 nm 2024 IEEE International Solid-State Circuits Conference5%f

44、ill gaps3 5 nm 2024 IEEE International Solid-State Circuits Conference5%fill gapsrotate?3 5 nm 2024 IEEE International Solid-State Circuits Conference5%fill gapsrotate?one tier3 5 nm 2024 IEEE International Solid-State Circuits Conference5%fill gapsrotate?stack tiersone tier3 5 nm 2024 IEEE Internat

45、ional Solid-State Circuits Conference5%fill gapsrotate?stack tiersone tierand more3 5 nm 2024 IEEE International Solid-State Circuits ConferenceYear of production202220252028203120342037Node label3nm2nm1.5nm1.0nm0.7nm0.5nmVdd(V)0.70.650.650.60.60.6Gate length(nm)2Nr of stacked tiers111246

46、Digital block area scaling10.740.550.260.130.08Digital block energy scaling10.810.720.560.50.493 International Roadmap for Devices and Systems(IRDS)2022 Edition.Only digital block area keeps scaling4 2024 IEEE International Solid-State Circuits ConferenceYear of production202220252028203120342037Nod

47、e label3nm2nm1.5nm1.0nm0.7nm0.5nmVdd(V)0.70.650.650.60.60.6Gate length(nm)2Nr of stacked tiers111246Digital block area scaling10.740.550.260.130.08Digital block energy scaling10.810.720.560.50.493 International Roadmap for Devices and Systems(IRDS)2022 Edition.Only digital block area keep

48、s scaling4 2024 IEEE International Solid-State Circuits Conferencefmax72012200565nm22nm“3nm”“0.5nm”10,000nmmetalsLog“lin”5Has Moores law come to an end?2024 IEEE International Solid-State Circuits Conferencefmax72012200565nm22nm“3nm”“0.5nm”10,000nmmetalsLog“lin”Transistor count

49、5Has Moores law come to an end?2024 IEEE International Solid-State Circuits Conferencefmax72012200565nm22nm“3nm”“0.5nm”10,000nmmetalsLog“lin”fmaxTransistor count5Has Moores law come to an end?2024 IEEE International Solid-State Circuits Conferencefmax72012200565nm22nm“3nm”“0.5n

50、m”10,000nmmetalsLog“lin”fmaxProcessor clock speedTransistor count5Has Moores law come to an end?2024 IEEE International Solid-State Circuits Conferencefmax72012200565nm22nm“3nm”“0.5nm”10,000nmmetalsLog“lin”fmaxProcessor clock speedDigital block energyTransistor count5Has Moores law come t

51、o an end?2024 IEEE International Solid-State Circuits Conferencefmax72012200565nm22nm“3nm”“0.5nm”10,000nmmetalsLog“lin”fmaxProcessor clock speedDigital block energyChannel lengthTransistor count5Has Moores law come to an end?2024 IEEE International Solid-State Circuits ConferenceWhat will

52、 the future bring us?6 2024 IEEE International Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density 2024 IEEE International Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density No better transistors for analog/RF 2024 IEEE Internation

53、al Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density No better transistors for analog/RF Less supply voltage 2024 IEEE International Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density No better transistors for analog/RF Less supp

54、ly voltageHow can we still design this?2024 IEEE International Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density No better transistors for analog/RF Less supply voltageHow can we still design this?We need to do something else!2024 IEEE International Solid-State Ci

55、rcuits ConferenceWhat will the future bring us?6 Higher digital density No better transistors for analog/RF Less supply voltageHow can we still design this?We need to do something else!2024 IEEE International Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density No be

56、tter transistors for analog/RF Less supply voltageHow can we still design this?We need to do something else!Only comparators,switches&passives 2024 IEEE International Solid-State Circuits ConferenceWhat will the future bring us?6 Higher digital density No better transistors for analog/RF Less supply

57、 voltageHow can we still design this?We need to do something else!Only comparators,switches&passivesNo more linear amplifiers 2024 IEEE International Solid-State Circuits ConferenceLOLNAClassical RF Front end 7 2024 IEEE International Solid-State Circuits ConferenceLOLNAClassical RF Front end micro

58、Watts7 2024 IEEE International Solid-State Circuits ConferenceLOLNAClassical RF Front end milli Wattsmicro Watts7 2024 IEEE International Solid-State Circuits ConferenceLOLNAClassical RF Front end milli Wattsmicro Watts7 full supply swing 2024 IEEE International Solid-State Circuits ConferenceLOLNAC

59、lassical RF Front end milli Wattsmicro Watts7spoiled child full supply swing 2024 IEEE International Solid-State Circuits ConferenceLOLNA8Lets try something else!2024 IEEE International Solid-State Circuits ConferenceLOLNA8Lets try something else!no more linear amplifiers 2024 IEEE International Sol

60、id-State Circuits ConferenceLOLNA8Lets try something else!no more LNAno more linear amplifiers 2024 IEEE International Solid-State Circuits ConferenceLOLNA8Lets try something else!no more LNAno more linear amplifiers small swing 2024 IEEE International Solid-State Circuits Conferencehard working LNA

61、DCLOLNA8Lets try something else!no more LNAno more linear amplifiers small swing 2024 IEEE International Solid-State Circuits Conferencehard working LNADCLOLNA8Lets try something else!no more LNAno more linear amplifiersworks for all analog frontends small swing 2024 IEEE International Solid-State C

62、ircuits ConferenceDisclaimer9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active

63、 linear gain!”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond

64、 like this to disruptive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”“RF is impossible in CMOS”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear gain!”“Zero IF is imposs

65、ible in CMOS”“RF is impossible in CMOS”“Bipolar is better than CMOS”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”“RF is impossible in CMOS”“Bipolar is bet

66、ter than CMOS”“Smaller than 0.7m CMOS is impossible”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”“RF is impossible in CMOS”“Bipolar is better than CMOS”“S

67、maller than 0.7m CMOS is impossible”“Who needs 1 MB of memory anyway?!”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”“RF is impossible in CMOS”“Bipolar is

68、better than CMOS”“Smaller than 0.7m CMOS is impossible”“Who needs 1 MB of memory anyway?!”“The earth is flat”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”

69、“RF is impossible in CMOS”“Bipolar is better than CMOS”“Smaller than 0.7m CMOS is impossible”“Who needs 1 MB of memory anyway?!”“The earth is flat”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disruptive ideas:“But you need active linear

70、 gain!”“Zero IF is impossible in CMOS”“RF is impossible in CMOS”“Bipolar is better than CMOS”“Smaller than 0.7m CMOS is impossible”“Who needs 1 MB of memory anyway?!”“The earth is flat”9 2024 IEEE International Solid-State Circuits ConferenceDisclaimer Seasoned people may respond like this to disrup

71、tive ideas:“But you need active linear gain!”“Zero IF is impossible in CMOS”“RF is impossible in CMOS”“Bipolar is better than CMOS”“Smaller than 0.7m CMOS is impossible”“Who needs 1 MB of memory anyway?!”“The earth is flat”9 2024 IEEE International Solid-State Circuits ConferenceOutline Has Moores l

72、aw come to an end?Fundamental limits of power dissipation Analog/Digital Conversion The“need”for analog pre-processing Comparator v.s.amplifier No more linear gain!Conclusions10 2024 IEEE International Solid-State Circuits ConferenceFundamental limits of power dissipation11 E.A.Vittoz,1990.11 2024 I

73、EEE International Solid-State Circuits Conference=DD DDFundamental limits of power dissipation11 E.A.Vittoz,1990.11 2024 IEEE International Solid-State Circuits Conference=DD DDDD=Fundamental limits of power dissipation11 E.A.Vittoz,1990.11 2024 IEEE International Solid-State Circuits Conference=DD

74、DDDD=SFundamental limits of power dissipation11 E.A.Vittoz,1990.11 2024 IEEE International Solid-State Circuits Conference=DD DDDD=SFundamental limits of power dissipation11 E.A.Vittoz,1990.=S2 22k11 2024 IEEE International Solid-State Circuits Conference=DD DDDD=Smin=D 8k Fundamental limits of powe

75、r dissipation11 E.A.Vittoz,1990.=S2 22k11 2024 IEEE International Solid-State Circuits Conference=DD DDDD=Smin=D 8k min=8k S=DDIfFundamental limits of power dissipation11 E.A.Vittoz,1990.=S2 22k11 2024 IEEE International Solid-State Circuits Conferencemin=8k 1211 E.A.Vittoz,1990.2024 IEEE Internatio

76、nal Solid-State Circuits Conferencemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or

77、 fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International Solid-State Circuits Conference10mDigital CMOS NxN bit multiplier:Power/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE Internation

78、al Solid-State Circuits Conference1m10mDigital CMOS NxN bit multiplier:Power/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International Solid-State Circuits Conference22nm1m10mDigital CMOS NxN bit multiplier:Power/BW W/GHz or fJSignal to

79、Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International Solid-State Circuits Conference22nm3nm1m10mDigital CMOS NxN bit multiplier:Power/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International S

80、olid-State Circuits Conference22nm3nm1m10m0.5nmDigital CMOS NxN bit multiplier:Power/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.2024 IEEE International Solid-State Circuits Conference22nm3nm1m10m0.5nmDigital CMOS NxN bit multiplier:Power/BW W/GHz

81、 or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k 1211 E.A.Vittoz,1990.SNR 30dB:pure analog wins 2024 IEEE International Solid-State Circuits Conference22nm3nm1m10m0.5nmDigital CMOS NxN bit multiplier:Power/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per polemin=8k min=8k

82、 1211 E.A.Vittoz,1990.SNR 30dB:pure analog wins 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole13 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole13

83、2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole13 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole13 2024 IEEE International Solid-State Circuits Con

84、ference?Power/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole13 2024 IEEE International Solid-State Circuits Conference14 2024 IEEE International Solid-State Circuits Conference14 2024 IEEE International Solid-State Circuits Conference14 2024 IEEE International Solid-State Circuits Co

85、nference14 2024 IEEE International Solid-State Circuits ConferenceP x 2(+3dB)SNR x 2(+3dB)14 2024 IEEE International Solid-State Circuits ConferenceP x 2(+3dB)SNR x 2(+3dB)14WLRC 2024 IEEE International Solid-State Circuits ConferenceP x 2(+3dB)SNR x 2(+3dB)14WLRC2WL2CR2 2024 IEEE International Soli

86、d-State Circuits ConferenceP x 2(+3dB)SNR x 2(+3dB)scale W=214WLRC2WL2CR2 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole15 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBP

87、ower/Bandwidth per pole15 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole15 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole15 2024 IEEE Internationa

88、l Solid-State Circuits ConferenceOutline Has Moores law come to an end?Fundamental limits of power dissipation Analog/Digital Conversion The“need”for analog pre-processing Comparator v.s.amplifier No more linear gain!Conclusions16 2024 IEEE International Solid-State Circuits ConferenceSuccessive App

89、roximation ADC17 2024 IEEE International Solid-State Circuits ConferenceSuccessive Approximation ADC17 2024 IEEE International Solid-State Circuits ConferenceSuccessive Approximation ADC17 2024 IEEE International Solid-State Circuits ConferenceSuccessive Approximation ADC17Noise 2024 IEEE Internatio

90、nal Solid-State Circuits ConferenceSigma Delta Modulatoractiveintegrator 2024 IEEE International Solid-State Circuits ConferenceSigma Delta Modulatoractiveintegratorpassivefilterpassive sigma delta modulator 2024 IEEE International Solid-State Circuits ConferenceSigma Delta Modulatoractiveintegrator

91、passivefilterpassive sigma delta modulator 2024 IEEE International Solid-State Circuits ConferenceSigma Delta Modulatoractiveintegratorpassivefilterpassive sigma delta modulator 2024 IEEE International Solid-State Circuits ConferenceSigma Delta Modulatoractiveintegratorpassivefilterpassive sigma del

92、ta modulatorNoise 2024 IEEE International Solid-State Circuits ConferenceADC Power19 2024 IEEE International Solid-State Circuits ConferenceADC Power19=2 2 Walden FoM:Matching limitedmatching 2024 IEEE International Solid-State Circuits ConferenceADC Power19=2 2 Walden FoM:Matching limitedmatching 2

93、024 IEEE International Solid-State Circuits ConferenceADC Power19=2 2 Walden FoM:Matching limitedmatching Schreier FoM:Noise limitedS=dB+10 10 2024 IEEE International Solid-State Circuits ConferenceADC PowerVittozmin=DDS 8k 19=2 2 Walden FoM:Matching limitedmatching Schreier FoM:Noise limitedS=dB+10

94、 10 2024 IEEE International Solid-State Circuits ConferenceADC PowerS,max=10 10(8)=195dBVittozmin=DDS 8k 19=2 2 Walden FoM:Matching limitedmatching Schreier FoM:Noise limitedS=dB+10 10 2024 IEEE International Solid-State Circuits ConferenceFundamental limit Driver powerSAR ADC:20 2024 IEEE Internati

95、onal Solid-State Circuits ConferenceFundamental limit Driver powerSAR ADC:20 2024 IEEE International Solid-State Circuits ConferenceFundamental limit Driver powerSAR ADC:20min,driver=DDS 8k Vittoz,again 2024 IEEE International Solid-State Circuits ConferenceFundamental limit Driver powerSAR ADC:20AD

96、C:min,driver=DDS 8k Vittoz,again 2024 IEEE International Solid-State Circuits ConferenceFundamental limit Driver powerSAR ADC:20min,driver=(1)DDS 8k ADC:min,driver=DDS 8k Vittoz,again 2024 IEEE International Solid-State Circuits ConferenceFundamental limit Driver powerSAR ADC:20In reality much more

97、power needed!min,driver=(1)DDS 8k ADC:min,driver=DDS 8k Vittoz,again 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per pole21 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/

98、Bandwidth per pole21S,max=10 10(8)=195dB 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per poleS=185dBPublished ADCs:21S,max=10 10(8)=195dB 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise

99、Ratio dBPower/Bandwidth per poleS=VDD)Low input impedanceReference power not counted21S,max=10 10(8)=195dB 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per poleS=VDD)Low input impedanceReference power not counted21S,max=10 10(8)=1

100、95dBADC+Driver+Reference 2024 IEEE International Solid-State Circuits ConferenceOutline Has Moores law come to an end?Fundamental limits of power dissipation Analog/Digital Conversion The“need”for analog pre-processing Comparator v.s.amplifier No more linear gain!Conclusions22 2024 IEEE Internationa

101、l Solid-State Circuits ConferenceLOLNAClassical RF Front end milli Wattsmicro Watts23 full supply swing 2024 IEEE International Solid-State Circuits ConferenceLOLNAPassive Mixer-First RF Front end24 2024 IEEE International Solid-State Circuits ConferenceLOLNAPassive Mixer-First RF Front end24N-path

102、circuits 2024 IEEE International Solid-State Circuits ConferenceLOLNAPassive Mixer-First RF Front end24N-path circuits 2024 IEEE International Solid-State Circuits ConferenceLOLNAPassive Mixer-First RF Front end24 full supply swingN-path circuits 2024 IEEE International Solid-State Circuits Conferen

103、ceLOLNAPassive Mixer-First RF Front endmicro Watts24 full supply swingN-path circuits 2024 IEEE International Solid-State Circuits ConferenceLOLNAPassive Mixer-First RF Front endMore linear,but still milli Wattsmicro Watts24 full supply swingN-path circuits 2024 IEEE International Solid-State Circui

104、ts ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per poleS=185dBADC:ADC+Driver+Ref.SOTA Passive Mixer-First RF Front end25 2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per poleS=185dBADC:ADC+Driver+Ref.SOTA

105、 Passive Mixer-First RF Front end25ISSCC24,paper 5.5*Only baseband Ipath,3 poles.2024 IEEE International Solid-State Circuits ConferencePower/BW W/GHz or fJSignal to Noise Ratio dBPower/Bandwidth per poleS=185dBADC:ADC+Driver+Ref.+40dBSOTA Passive Mixer-First RF Front end25ISSCC24,paper 5.5*Only bas

106、eband Ipath,3 poles.2024 IEEE International Solid-State Circuits ConferenceLOLNAAmplifiers:Noise+Linearity challengenoiselinearitylinearity26 2024 IEEE International Solid-State Circuits ConferenceBaseband LNA noise challenge27 2024 IEEE International Solid-State Circuits Conferenceinput stageoutput

107、 stageBaseband LNA noise challenge27 2024 IEEE International Solid-State Circuits Conferenceinput stageoutput stageBaseband LNA noise challengeweak inversion,shot noise27 2024 IEEE International Solid-State Circuits Conferenceinput stageoutput stageBaseband LNA noise challengeweak inversion,shot noi

108、se27Brick wall noise filter 2024 IEEE International Solid-State Circuits Conferenceinput stageoutput stageBaseband LNA noise challengeweak inversion,shot noise27Brick wall noise filtercount only this current 2024 IEEE International Solid-State Circuits Conferenceinput stageoutput stageBaseband LNA n

109、oise challengeweak inversion,shot noise27Brick wall noise filtercount only this currenttail=8(k)2n2 q 2024 IEEE International Solid-State Circuits Conferencemicro Wattsmilli WattsLOLNAThe easy life for the ADC28 full supply swing 2024 IEEE International Solid-State Circuits Conferencemicro Wattsmill

110、i WattsLOLNAThe easy life for the ADC28tail=8(k)2n2 q full supply swing 2024 IEEE International Solid-State Circuits Conferencemicro Wattsmilli WattsLOLNAThe easy life for the ADC28tail=8(k)2n2 q full supply swing+more power!2024 IEEE International Solid-State Circuits ConferenceSuccessive Approxima

111、tion ADC is too easy29 2024 IEEE International Solid-State Circuits ConferenceSuccessive Approximation ADC is too easy may have quite high noise no linearity needed29 2024 IEEE International Solid-State Circuits ConferenceSuccessive Approximation ADC is too easy may have quite high noise no linearit

112、y neededIDD?29 2024 IEEE International Solid-State Circuits ConferenceOutline Has Moores law come to an end?Fundamental limits of power dissipation Analog/Digital Conversion The“need”for analog pre-processing Comparator v.s.amplifier No more linear gain!Conclusions30 2024 IEEE International Solid-St

113、ate Circuits ConferenceComparatorpreamp46 Bindra,JSSC1831 2024 IEEE International Solid-State Circuits ConferenceComparatorpreamp46 Bindra,JSSC1831latch 2024 IEEE International Solid-State Circuits ConferenceComparatorpreamp46 Bindra,JSSC1831latch 2024 IEEE International Solid-State Circuits Confere

114、nceComparatorpreamp46 Bindra,JSSC1831latch 2024 IEEE International Solid-State Circuits ConferenceComparatorpreamp46 Bindra,JSSC1831latchVDDVDD 2024 IEEE International Solid-State Circuits ConferenceComparatorpreamp46 Bindra,JSSC1831latchVDDVDD 2024 IEEE International Solid-State Circuits Conference

115、Comparatorpreamplatch46 Bindra,JSSC1832 2024 IEEE International Solid-State Circuits ConferenceComparatorpreamplatch46 Bindra,JSSC1832Vc+Vc-2024 IEEE International Solid-State Circuits ConferenceComparatorpreamplatch46 Bindra,JSSC1832Vc+Vc-2024 IEEE International Solid-State Circuits ConferenceCompa

116、rator What about noise?33preampVc+Vc-2024 IEEE International Solid-State Circuits ConferenceComparator What about noise?33preampVc+Vc-weak inversion,shot noise 2024 IEEE International Solid-State Circuits ConferenceComparator What about noise?33preampVc+Vc-2024 IEEE International Solid-State Circuit

117、s ConferenceComparator What about noise?33preampVc+Vc-c2n,Di,2=electr,p 2024 IEEE International Solid-State Circuits ConferenceComparator What about noise?33preampVc+Vc-,count electronsduring dischargec2n,Di,2=electr,p 2024 IEEE International Solid-State Circuits ConferenceComparator What about nois

118、e?33preampVc+Vc-DD=4(k)2n2 qcharge per clock cycle,count electronsduring dischargec2n,Di,2=electr,p 2024 IEEE International Solid-State Circuits Conferencetail=8(k)2n2 q Itail34IDDt001/fclockCLK=reset 2024 IEEE International Solid-State Circuits Conferencetail=8(k)2n2 q DD=4(k)2n2 qItail34IDDt001/fc

119、lockCLK=reset 2024 IEEE International Solid-State Circuits Conferencetail=8(k)2n2 q DD=4(k)2n2 qItailDD=clock34IDDt001/fclockCLK=reset 2024 IEEE International Solid-State Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qItailDD=clock34IDDt001/fclockCLK=reset 2024 IEEE International Solid-State

120、Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q ItailDD=clock34IDDt001/fclockCLK=reset 2024 IEEE International Solid-State Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34IDDt001/fclockCLK=reset 2024 IEEE International Solid-State Circuits Confere

121、nceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34IDDt001/fclockCLK=resetIDD 2024 IEEE International Solid-State Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34IDDt001/fclockCLK=resetIDDQDD 2024 IEEE International Solid-State Circuits Conferencecloc

122、k=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34IDDt001/fclockCLK=resetQDDIDDQDD 2024 IEEE International Solid-State Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34IDDt001/fclockCLK=resetQDDIDDQDDsame area,same chargesame power!2024 IEEE International So

123、lid-State Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34But:only 1 bit,NyquistIDDt001/fclockCLK=resetQDDIDDQDDsame area,same chargesame power!2024 IEEE International Solid-State Circuits Conferenceclock=2 tail=8(k)2n2 q DD=4(k)2n2 qDD=8(k)2n2 q=ItailDD=clock34But:

124、only 1 bit,NyquistIDDt001/fclockCLK=resetNeed oversamplingQDDIDDQDDsame area,same chargesame power!2024 IEEE International Solid-State Circuits Conference35BWfclock2reference designPower=P0Comparator oversampling=power neutral(in theory)Power=P0 2024 IEEE International Solid-State Circuits Conferenc

125、e35BWfclock2reference designPower=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversampling=power neutral(in theory)Power=P0 2024 IEEE International Solid-State Circuits Conference35BWfclock2reference designPower=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversampling=power neutral(in

126、theory)Power=P0 2024 IEEE International Solid-State Circuits Conference35BWfclock2reference designPower=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversamplingdigital filter=power neutral(in theory)Power=P0 2024 IEEE International Solid-State Circuits Conference35BWfclock2reference designPow

127、er=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversamplingdigital filter=power neutral(in theory)Power=P0 2024 IEEE International Solid-State Circuits Conference35BWfclock2reference designPower=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversamplingdigital filterImpedance scale W=1=1

128、2fclock2BW=power neutral(in theory)Power=P0 2024 IEEE International Solid-State Circuits Conference35BWfclock2reference designPower=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversamplingdigital filterImpedance scale W=1=12fclock2BW=power neutral(in theory)Power=P0 2024 IEEE International So

129、lid-State Circuits Conference35BWfclock2reference designPower=P0OSR=2:2x oversamplefclockBW2Power=2xP0Comparator oversamplingdigital filterImpedance scale W=1=12fclock2BW=power neutral(in theory)Power=P0Power=P0 2024 IEEE International Solid-State Circuits ConferenceAmplifier versus Oversampled Comp

130、aratorIDD36 2024 IEEE International Solid-State Circuits ConferenceAmplifier versus Oversampled ComparatorIDD36tail=8(k)2n2 q DD=8(k)2n2 q=2024 IEEE International Solid-State Circuits ConferenceAmplifier versus Oversampled ComparatorIDDnoise set by#electrons passed through input transistor per 1/BW3

131、6tail=8(k)2n2 q DD=8(k)2n2 q=2024 IEEE International Solid-State Circuits ConferenceAmplifier versus Oversampled Comparator-Need large linear output swing-Drive next analog inputIDDnoise set by#electrons passed through input transistor per 1/BW36tail=8(k)2n2 q DD=8(k)2n2 q=2024 IEEE International So

132、lid-State Circuits ConferenceAmplifier versus Oversampled Comparator-Need large linear output swing-Drive next analog input+not linear+has easy load to driveIDDnoise set by#electrons passed through input transistor per 1/BW36tail=8(k)2n2 q DD=8(k)2n2 q=2024 IEEE International Solid-State Circuits Co

133、nferenceOutline Has Moores law come to an end?Fundamental limits of power dissipation Analog/Digital Conversion The“need”for analog pre-processing Comparator v.s.amplifier No more linear gain!Conclusions37 2024 IEEE International Solid-State Circuits ConferenceThis is what we normally do:good FoMlow

134、 noisehigh linearityhigh gain38 2024 IEEE International Solid-State Circuits ConferenceThis is what we normally do:good FoMlow noisehigh linearityhigh gainHigh Risk,.38 2024 IEEE International Solid-State Circuits ConferenceThis is what we normally do:good FoMlow noisehigh linearityhigh gainHigh Ris

135、k,.38 2024 IEEE International Solid-State Circuits ConferenceThis is what we normally do:good FoMlow noisehigh linearityhigh gainHigh Risk,.38low noise 2024 IEEE International Solid-State Circuits ConferenceThis is what we normally do:good FoMlow noisehigh linearityhigh gainHigh Risk,.38Low-Swing,Lo

136、w Noise ADClow noise 2024 IEEE International Solid-State Circuits ConferenceThis is what we normally do:good FoMlow noisehigh linearityhigh gainHigh Risk,.No Gain!38Low-Swing,Low Noise ADClow noise 2024 IEEE International Solid-State Circuits Conference39low noiseVS=VDDA 2024 IEEE International Soli

137、d-State Circuits ConferenceBad FoM39low noiseVS=VDDA 2024 IEEE International Solid-State Circuits ConferenceBad FoMmin=DDS 8k 39low noiseVS=VDDA 2024 IEEE International Solid-State Circuits ConferenceBad FoMmin=8k min=DDS 8k 39low noiseVS=VDDA 2024 IEEE International Solid-State Circuits ConferenceB

138、ad FoMmin=8k min=DDS 8k “A”times worse FoM is totally fine at system level39low noiseVS=VDDA 2024 IEEE International Solid-State Circuits ConferenceBad FoMmin=8k min=DDS 8k “A”times worse FoM is totally fine at system level39fair=dB+10 10+10 10low noiseVS=VDDA 2024 IEEE International Solid-State Cir

139、cuits ConferenceSmall swing SAR ADC without active linear gain40 2024 IEEE International Solid-State Circuits ConferenceSmall swing SAR ADC without active linear gain40small input swing,no linear pre-amplifier 2024 IEEE International Solid-State Circuits ConferenceSmall swing SAR ADC without active

140、linear gain40Makes input window smallsmall input swing,no linear pre-amplifier 2024 IEEE International Solid-State Circuits ConferenceSmall swing SAR ADC without active linear gainHigh power,but less than a linear pre-amplifier before the ADC would otherwise need40Makes input window smallsmall input

141、 swing,no linear pre-amplifier 2024 IEEE International Solid-State Circuits ConferenceSmall swing ADC without active linear gain41 2024 IEEE International Solid-State Circuits ConferenceSmall swing ADC without active linear gain41small input swing,no linear pre-amplifier 2024 IEEE International Soli

142、d-State Circuits ConferenceSmall swing ADC without active linear gain41Makes input window smallsmall input swing,no linear pre-amplifier 2024 IEEE International Solid-State Circuits ConferenceSmall swing ADC without active linear gain41High power,but less than a linear pre-amplifierbefore the ADC wo

143、uld otherwise needMakes input window smallsmall input swing,no linear pre-amplifier 2024 IEEE International Solid-State Circuits ConferenceSmall swing ADC close to fund power limit42passive filterfull swing DAClow-noisecomparator 2024 IEEE International Solid-State Circuits ConferenceSmall swing ADC

144、 close to fund power limit42passive filterfull swing DAClow-noisecomparator 2024 IEEE International Solid-State Circuits ConferenceSmall swing ADC close to fund power limitmin=8k No need for factor“A”worse42passive filterfull swing DAClow-noisecomparator 2024 IEEE International Solid-State Circuits

145、Conference43Can we build a receiver without active linear gain?2024 IEEE International Solid-State Circuits ConferenceSome form ofRF Impedance up-transformation43Can we build a receiver without active linear gain?2024 IEEE International Solid-State Circuits ConferenceSome form ofRF Impedance up-tran

146、sformation43Some form of capacitor-stackingN-path circuitsCan we build a receiver without active linear gain?2024 IEEE International Solid-State Circuits ConferenceSome form ofRF Impedance up-transformation43Some form of capacitor-stackingN-path circuitspassive voltage gain,filtering&downconversionC

147、an we build a receiver without active linear gain?2024 IEEE International Solid-State Circuits ConferenceSome form ofRF Impedance up-transformationLow noise,low swing ADC(with bad FoM)43Some form of capacitor-stackingN-path circuitspassive voltage gain,filtering&downconversionCan we build a receiver

148、 without active linear gain?2024 IEEE International Solid-State Circuits ConferenceSome form ofRF Impedance up-transformationLow noise,low swing ADC(with bad FoM)43No LNA,but LNADCSome form of capacitor-stackingN-path circuitspassive voltage gain,filtering&downconversionCan we build a receiver witho

149、ut active linear gain?2024 IEEE International Solid-State Circuits ConferenceOur future linear amplifier?44 2024 IEEE International Solid-State Circuits ConferenceConclusions45 2024 IEEE International Solid-State Circuits ConferenceConclusionsMoores law:more transistors,the rest gets worse45 2024 IE

150、EE International Solid-State Circuits ConferenceConclusionsMoores law:more transistors,the rest gets worseAnalog preprocessing burns the power45 2024 IEEE International Solid-State Circuits ConferenceConclusionsMoores law:more transistors,the rest gets worseAnalog preprocessing burns the power ADCs

151、have a too-easy life45 2024 IEEE International Solid-State Circuits ConferenceConclusionsMoores law:more transistors,the rest gets worseAnalog preprocessing burns the power ADCs have a too-easy lifeLets try something else:45 2024 IEEE International Solid-State Circuits ConferenceConclusionsMoores la

152、w:more transistors,the rest gets worseAnalog preprocessing burns the power ADCs have a too-easy lifeLets try something else:45high risk,no gain!2024 IEEE International Solid-State Circuits ConferenceAcknowledgments Anne Johan Annema,Jurriaan Schmitz,Eric Klumperink,Ronan van der Zee,Harijot Singh Bi

153、ndra,Jeroen Ponte,Roel Plompen,Emiel Zijlma,Stef van Zanten,Robin Lohuis,Klaasde Haan,Remon Cents,Joep Zanen,Alexander Delke,Frank OMahony,Eugenio Cantatore,Piet Wambacq,AnanthaChandrakasan and Marian Verhelst.This project has received funding from the European Research Council(ERC)under the Europea

154、n Unions Horizon 2020 research and innovation programme(grant agreement No 834389)46Computing in the Era of Generative AIJonah Alben|Senior Vice President of GPU EngineeringGenerative AI Breakthrough CapabilitiesArchitecture Building AI SupercomputersAI for Chip Design A New FrontierTodays TopicsGen

155、erative AIBreakthrough AI-Powered ApplicationsIgniting the modern era of generative AIText-to-ImageStable DiffusionLarge Language ModelsChatGPT 2024 IEEE|International Solid-State Circuits ConferenceGenerative AI FutureMulti-modal intelligenceTEXTAUDIOIMAGE3DVIDEODNAPROTEINMOLECULEANIMATIONANIMATION

156、MOLECULEPROTEINDNAVIDEO3DIMAGEAUDIOTEXT 2024 IEEE|International Solid-State Circuits ConferenceNew Tools for the Most Important Work We DoText GenerationTranslationImage GenerationCodingBiologyTranslating WikipediaReal-TimeMetaverse TranslationNLLB-200Function GenerationDynamic Code CommentingCODEXM

157、olecular RepresentationsDrug DiscoveryMegaMolBARTBrand CreationGaming Characterse-DiffiSummarizationMarketing CopyGPT-3How has NVIDIA contributed to acceleration of AI?NVIDIA has been a pioneer in the field of AI since the very beginning.Our GPU platform has enabled the rapid development of AI from

158、the training of neural networks,to inference in the data center,on-device AI in the car and in the cloud,and the deployment of AI to tackle challenging problems like conversational AI and translation.NVIDIAs GPU-accelerated computing platform is the engine of AI it is the most important computing pl

159、atform of our time.*Generated using NVIDIA NeMo service530B 2024 IEEE|International Solid-State Circuits ConferenceArchitectureAI Computers Demand the Best of Every TechnologyMassive Compute Horsepower Tensor Cores designed for AI compute 4 petaFLOPs FP8 in latest Hopper GPUHigh-Bandwidth Memory Tec

160、hnologies Fast compute needs high bandwidth memory Hopper GPU supports up to 144GB of state-of-the-art HBM3e with 4.9 TB/s bandwidthCutting-Edge IO and SerDes High-speed IO and SerDes Hopper supports 900 GB/s NVLink between all pairs of GPUs in a system with NVSwitchData Center Scale Design Need to

161、keep pushing the envelope on performance and new features with chip packaging,cooling,and networking while also continuing to innovate on manufacturability,reliability,and serviceability 2024 IEEE|International Solid-State Circuits ConferenceNVIDIA Hopper GPU Full Implementation80B Transistors,814mm

162、2in TSMC 4N1.144 SMs 2x Performance Per Clock 4thGen Tensor Core Thread Block Clusters2.New Memory System Worlds First HBM3e DRAM Larger 60MB L23.4thGen NVLink 900GB/s total BW New SHARP support NVLinkNetwork2132 2024 IEEE|International Solid-State Circuits ConferenceHopper Streaming Multiprocessor(

163、SM)Architecture New 4thGen Tensor Core New Tensor Memory Accelerator Fully asynchronous data movement New Thread Block Clusters Turn locality into efficiency 256 KB L1$/Shared Memory 2024 IEEE|International Solid-State Circuits ConferenceThe Essence of Tensor CoresA0,0A0,1A0,2A0,3A1,0A1,1A1,2A1,3D=A

164、*B+CA2,0A2,1A2,2A2,3A3,0A3,1A3,2A3,3B0,0B0,1B0,2B0,3B1,0B1,1B1,2B1,3B2,0B2,1B2,2B2,3B3,0B3,1B3,2B3,3C0,0C0,1C0,2C0,3C1,0C1,1C1,2C1,3C2,0C2,1C2,2C2,3C3,0C3,1C3,2C3,3D=One input operand read can be re-used for many output values 2024 IEEE|International Solid-State Circuits ConferenceHopper 4thGen Tens

165、or Core 2x faster clock-for-clock Supports wide range of storage and math formats New FP8 format support More efficient data management saves up to 30%operand delivery power Accelerates sparse tensor arithmeticFormatA100 SMMACs/clockdense|sparseH100 SMMACs/clockdense|sparseSpeedupFP6464|-0128|-2xTF3

166、2512|10241024|20482xFP161024|20482048|40962xBF161024|20482048|40962xINT82048|40964096|81922xFP8-4096|8192New!2024 IEEE|International Solid-State Circuits ConferenceArchitecture Innovation Fuels Compute Advances4thGeneration NVIDIA Tensor Cores and custom AI numeric formats0500025003000350

167、04000450020022TFLOPSAI ComputeNVIDIA Hopper814mm2|TSMC 4N|Up to 144GB HBM3e|4thGen NVLinkP10019 TFLOPSFP16V100130 TFLOPS FP16A100620 TFLOPS BF16/FP16H1004,000 TFLOPSFP8 2024 IEEE|International Solid-State Circuits Conference3rdGeneration NVSwitchChip characteristics32 PHY Lanes32 PHY Lane

168、s32 PHY Lanes32 PHY LanesPORT Logic(including SHARP accelerators)PORT Logic(including SHARP accelerators)XBARLargest NVSwitch Ever TSMC 4N process 25.1B transistors 294mm2 50mmX50mm package(2645 balls)Highest Bandwidth Ever 64 NVLink4 ports(x2 per NVLink)3.2TB/s full-duplex bandwidth 50Gbaud PAM4 di

169、ff-pair signaling All ports NVLink Network capableNew Capabilities 400GFLOPS of FP32 SHARP(other number formats are supported)NVLink Network management,security and telemetry engines 2024 IEEE|International Solid-State Circuits ConferenceNVIDIA Eos AI Supercomputer10,752 Hopper GPUs|400 Gbps Quantum

170、-2 InfiniBandAI Compute42.6 EFLOPS FP8GPU Memory860 TB HBM3Aggregate Memory Bandwidth36 PB/secAggregate Interconnect Bandwidth1.1 PB/secNVIDIA“Eos”An essential instrument of our work and a blueprint for others 2024 IEEE|International Solid-State Circuits ConferenceState-of-the-Art LLM Training Requi

171、res Large Scale73x faster compute enables transition to ever more massive models1.6 Years4 months8 daysNVIDIA Selene512 A100NVIDIA Eos512 H100NVIDIA Eos10,752 H100Training GPT-3 175B(2020 Era Model)Projected Time to Train on 3.7 Trillion Tokens11J.Hoffmann et al.,Training compute-optimal large langu

172、age models,arXiv,2022,https:/doi.org/10.48550/arXiv.2203.15556.MLPerf Training v3.1.Results retrieved from www.mlperf.org on November 8,2023,from entries 3.1-2007 and 3.1-2057.Projected time to train on 3.7 trillion tokens is not an MLPerf metric;metric derived by extrapolating benchmark time to tra

173、in on 1 billion tokens to 3.7 trillion tokens.NVIDIA Selene results with 512 A100 are Unverified,results not verified by MLCommons.The MLPerf name and logo are trademarks of MLCommons Association in the United States and other countries.All rights reserved.Unauthorized use strictly prohibited.See ww

174、w.mlcommons.org for more information.73x Faster 2024 IEEE|International Solid-State Circuits Conference05,00010,00015,00020,00025,00030,000201920212023Training ScaleScale of AI Computers is Growing RapidlyFueled by the demands of generative AIMLPerf1,536 V100 GPUsMLPerf4,320 A100 GPUsCommercial Scal

175、e30,000 GPUs1MLPerf10,752 H100 GPUsGPUs1See https:/arxiv.org/pdf/2307.12169.pdf 2024 IEEE|International Solid-State Circuits ConferenceAI For Chip DesignPrefixRL Circuit Design with Deep Reinforcement LearningSmaller and faster circuits compared to state-of-the-art EDA toolUp to 25%lower area than S

176、OTA EDA tool adder at the same delayNearly 13,000 circuits in Hopper designed using PrefixRL 2024 IEEE|International Solid-State Circuits ConferenceChipNeMoDomain adapted LLMsfor chip design 2024 IEEE|International Solid-State Circuits ConferenceChipNeMoA chatbot,a code generator,and a bug analysis

177、toolEngineering Assistant ChatbotEDA Script GenerationBug Summary and Analysis 2024 IEEE|International Solid-State Circuits ConferenceKey Takeaways and Call to Action Generative AI is reshaping computing,supercharging existing use cases and unlocking new ones Bringing Generative AI to new domains an

178、d displacing traditional methods doesnt happen overnight deep learning methods first compete with and then eventually pull away with continued iteration We must continue to raise the bar in all areas we are working on faster chips,advances in semiconductor technology,new memory technologies,and even

179、 higher-speed networking all designed with resiliency at every level AI is just getting started 2024 IEEE|International Solid-State Circuits ConferenceFueling Semiconductor Innovation and Entrepreneurship in the Next DecadeISSCC 2024February 19,2024Lip-Bu Tan,Chairman,Walden International2 2024 IEEE

180、 International Solid-State Circuits ConferenceCOMPUTE PERFORMANCEMEMORY BANDWIDTH(GB/s)INTERNET CONNECTIVITY(BPS)Decades of Semiconductor Innovation 1E+021E+041E+061E+081E+000201020202030Source:Nielsen Norman GroupSource:MicronSource:Science.org50024020052

181、00,0001,00010010100,0001Relative performance or relative clock frequency3 2024 IEEE International Solid-State Circuits ConferenceAI/MLHyperscale Computing5GIoTIndustry 4.0Autonomous VehiclesGenerational Semiconductor Drivers5111,077SEMICONDUCTORS$1 TrillionSource:IBS Market Forecast,June

182、2023Semiconductors Growth($B)202220232024202520262027202820293,074$3 Trillion202220232024202520262027Electronic Systems Market($B)ELECTRONIC SYSTEMSSource:Omdia,Electronic Systems Market,March 20234 2024 IEEE International Solid-State Circuits ConferenceTechnologies are Reaching 100M Users Faster th

183、an EverChatGPTTikTokInstagramUberFacebookWhatsAppWorld Wide Web02005200257 years4 years,6 months3 years,6 months2 years,6 months5 years,10 months9 months2 monthsSource:https:/ 2024 IEEE International Solid-State Circuits ConferenceDATA CONSUMED PER HOURAmazon PrimeNetflixYouTub

184、eTiktokZoomInstagramSkypeGoogle HangoutsTwitterBBC iPlayerFacebookSpotify3000GB*3000GB*3000GB*840MB810MBSource:Buymobile,Jan 2022,https:/ video streamingData Underpins Each of The Generational DriversTransmissionProcessingStorage6 2024 IEEE International Solid-State Circuits ConferenceBuilding Techn

185、ologies for A Better WorldDigital BiologyGenerative AISustainability7 2024 IEEE International Solid-State Circuits ConferenceGLOBAL DATA CENTER ENERGY CONSUMPTIONDatacenter Energy Consumption to Reach 21%of Global SupplySource:AI models are devouring energy.Tools to reduce consumption are here,if da

186、ta centers will adopt.|MIT Lincoln Laboratory.Sept 22,2023.Source:Enerdata,IEA,2022Huge,popular models like ChatGPTsignal a trend of large-scale AI,boosting some forecasts that predict data centers could draw up to 21%of the worlds electricity supply by 2030.8 2024 IEEE International Solid-State Cir

187、cuits ConferenceAI Driving Global Growth of 3D-IC Chiplets0204060800242025202620272028202920302031203220333D-IC CHIPLET GROWTH($B)CPU ChipletsGPU ChipletsMemory ChipletsNetworking ChipletsSensor ChipletsSource:market.us9 2024 IEEE International Solid-State Circuits ConferenceSemiconductor

188、 Devices Market for EVs:30%CAGRSource:Mordor Intelligence,2023AUTOMOTIVE SEMICONDUCTOR REVENUE($B)10 2024 IEEE International Solid-State Circuits ConferenceSource:market.us,Edge AI Market,Jan 2024GLOBAL AI AT THE EDGE REVENUE($B)025507523202420252026202720282029203020312032Market size($B)

189、OtherConsumersHealthcareIT&TelecomGovernmentAutomotiveManufacturingIndustry 4.0 Driving Edge AI Growth11 2024 IEEE International Solid-State Circuits ConferenceWorkload optimized CPUand AI platformOptimized video coding unitTraining supercomputer and self-driving platform35%of shopping revenue is ge

190、nerated by recommendation enginesVideo live streaming engines deliver4K and 8K video for live viewingBillions of miles of driving data and millions full self driving milesIncreasing Applications of Purpose-built SiliconeCommerceStreamingADASSource:McKinseySource:Motley FoolSource:Google12 2024 IEEE

191、International Solid-State Circuits ConferenceTransitioning to the Software 2.0 System Development FlowGenerate SystemBuild ML ModelDesign Hardware13 2024 IEEE International Solid-State Circuits ConferenceAccelerating Chip and System Design Productivity with GenAIMANUALCIRCUIT DESIGNAUTOMATEDTRANSIST

192、OR-LEVEL DESIGNAUTOMATED CELL-BASED DESIGNAUTOMATED RTL DESIGN REUSEAI-DRIVEN SYSTEMDESIGN10XPRODUCTIVITY10XPRODUCTIVITYc10XPRODUCTIVITY10XPRODUCTIVITY14 2024 IEEE International Solid-State Circuits ConferenceGenerative AI in Semiconductor DesignMULTI-RUN DATA AND ANALYTICS PLATFORMGENERATIVE AI APP

193、LICATIONSDigital DesignAnalog/CustomDesignDebug&VerificationPrinted Circuit Board DesignMultiphysics OptimizationMobile CPU 3nm5X ProductivityAutomotive SoCReduced debug effortPCB50X ProductivityAuto PCB and Pkg 30X ProductivityAI Processor 5nm6X Productivity7.7%total power12.5%total power6Xproducti

194、vity14%shorter wire length134%better return lossCourtesy of Cadence Design Systems15 2024 IEEE International Solid-State Circuits ConferenceGenerative AI Impact on Biosystem and PharmaNumber of FDA approved new molecules per US$bn global R&D spend has halved every 9 yearsSource:Diagnosing the declin

195、e in pharmaceutical R&D efficiency,Nature Reviews Drug Discovery,2012Need breakthrough simulation and AI techniques to reshape pharma funnel1001010.70020102020YearNew drugs per$billionR&D(log scale)FDA tightens regulationsPost thalidomideFDA clears backlog followingPDUFA regula

196、tions andPerhaps relaxes on HIV drugsFirst wave of biotechIncrease in orphansPlus targetedCancer drugs8.4%per year decrease innew drugs per$billion R&DBroaden the funnel of potentialTherapeutic starting pointsTraditional pharma pipelineIdeal pharma pipelineIdentify failures earlier inthe research cy

197、cle when theyare relatively inexpensive,torapidly narrow the neck of the funnelAccelerate delivery of high-potentialdrug candidates to the clinic1Drug DiscoveryClinicalFDA Review2FDA ReviewDrug DiscoveryPre-clinicalPreclinicalClinical316 2024 IEEE International Solid-State Circuits ConferenceFull-St

198、ack Vertically-Integrated Secure GenAI PlatformApplication LayerGenAI Model LayerData LayerInfrastructure LayerGenAI Platform17 2024 IEEE International Solid-State Circuits ConferenceApplication LayerReal World Generative AI ApplicationsData analysis+insightsBetter customer experience+personalizedAu

199、tomatic+EfficiencyPredicate analysis+forecastingSupply chain optimizationFraud detection+cybersecurityProcess implementationNew revenue modelBetter application development+software developmentGenAI Model LayerData LayerInfrastructure Layer18 2024 IEEE International Solid-State Circuits ConferenceSub

200、-Angstrom GeometriesInnovating Solutions to Technological ChallengesDatacenter PowerData ScalingHeterogenous IntegrationScalability and ThroughputEnergy Efficient Architectures,Digital Twins,Design for SustainabilityNew Materials:GaN,InP,SiCarbAdvanced Pkg:Glass,Diamond SubstratesOptical,Edge AIInte

201、grated Package Design&Analysis,Chiplet Interconnect StandardsSoftware 2.0ChallengesSolutions19 2024 IEEE International Solid-State Circuits ConferenceEdgeNew Semiconductors/New Subsystems/New MaterialsXPUAI/Neural ComputeIndustrial IoTRobotic/DroneXROBOTSwitchSiPhotonicsSerDes/ConnectivityQuantum Co

202、mputeSoftware Defined Kubaernetes StorageNew Material20 2024 IEEE International Solid-State Circuits ConferenceSecurityAI-enabled Workflow/Software 2.0/Web 3.0Computational SimulationData Labeling&AnalyticsCloud Automation/OptimizationData Search/Query PlatformUnified Data PlatformClimate Tech Analy

203、tics PlatformFinTechProcess Mining/Business IntelligenceWeb 3.0FlexComputeAuradineMLIR/Compiler21 2024 IEEE International Solid-State Circuits ConferenceGenAI Model LayerContextual AIVARIATIONALAIAI21labsSpaceCraftTypefaceAsatoGenerative AI 22 2024 IEEE International Solid-State Circuits ConferenceA

204、I-enabled Drug Discovery/DevelopmentMedical Imaging/EquipmentDrug Discovery/DeveloperCancer Therapeutic/Stem Cell DevelopmentGreenstonesOneHealthHealthcare ServiceMeasureMeNeuroScienceLVISMedical Data PlatformEcho Neurotechnologies23 2024 IEEE International Solid-State Circuits ConferenceCall to Act

205、ion Invest in groundbreaking research that opens doors to new markets and applications Invest in the next generation of engineers,designers,and thinkers Explore private/public partnerships to foster innovation,create high-value jobs,and shape the future 2024 Walden International.All rights reserved.2324 2024 IEEE International Solid-State Circuits Conference