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美国半导体协会:美国半导体研究:通过创新获得领导力(英文版)(30页).pdf

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美国半导体协会:美国半导体研究:通过创新获得领导力(英文版)(30页).pdf

1、American Semiconductor Research:Leadership Through Innovation This report would not have been possible without the contributions of our BCG colleagues Ramiro Palma,Raj Varadarajan,Aniket Patil,and Amit Rai,as well as our SIA colleagues Jimmy Goodrich,Eric Breckenfeld,Robert Casanova,and Susie Zhi Su

2、.About the Semiconductor Industry Association(SIA)The Semiconductor Industry Association(SIA)is the voice of the semiconductor industry,one of Americas top export industries and a key driver of Americas economic strength,national security,and global competitiveness.Semiconductors the tiny chips that

3、 enable modern technologies power incredible products and services that have transformed our lives and our economy.The semiconductor industry directly employs over a quarter of a million workers in the United States,and U.S.semiconductor company sales totaled$258 billion in 2021.SIA represents 99%of

4、 the U.S.semiconductor industry by revenue and nearly two-thirds of non-U.S.chip firms.Through this coalition,SIA seeks to strengthen leadership of semiconductor manufacturing,design,and research by working with Congress,the Administration,and key industry stakeholders around the world to encourage

5、policies that fuel innovation,propel business,and drive international competition.Learn more at www.semiconductors.org.AcknowledgementsTable of ContentsExecutive SummarySemiconductor R&D is the process by which innovative ideas are transformed into technological advancements and capability to enable

6、 the creation of more,and more advanced,semiconductors Semiconductor R&D is important and is part of a virtuous cycle of innovation that supports U.S.technological leadershipIn the U.S.R&D ecosystem,government,academia,and private industry all play a significant role in funding and performing the R&

7、D that drives commercially useful innovationThe U.S.R&D ecosystem faces several challenges,including those related to piloting and prototyping,that hinder the effectiveness of the ecosystemOther regions are taking steps to mitigate these challenges and improve the relative effectiveness of their R&D

8、 ecosystemsEntities responsible for existing public investment of semiconductor R&D will continue to play a significant role in the U.S.R&D ecosystemComplementing these entities,the CHIPS Act establishes important new organizations and provides an opportunity to address challenges to the U.S.R&D eco

9、systemThe NSTC and NAPMP should promote U.S.economic competitiveness through investments in several areasThe U.S.can employ a range of the best practices to ensure the success of this public investment AppendixPage 1Page 3Page 5Page 7Page 10Page 11Page 12Page 14Page 16Page 24Page 25From powering dat

10、a centers to controlling the Mars rover Perseverance,the world demands more of its semiconductors now than it did just a few years ago.As in the past,meeting these demands and enabling technological leadership across the U.S.economy will require new innovations,made possible by investments in semico

11、nductor research and development(R&D).To be commercially useful,an innovation must traverse five phases of R&D before scaling to volume production.Each successive phase is increasingly challenging:a large portfolio of initial bets is required for 1-2 innovations to reach volume production.R&D is a c

12、ritical part of a virtuous cycle of innovation that supports U.S.technology leadership.Innovations yield superior technologies and products that,when used in commercial production,provide the funds needed to make massive investments in future R&D.To develop these innovations,the U.S.semiconductor in

13、dustry invested$50 billion in R&D in 2021 alone.With the passage of the 2022 CHIPS and Science act,the federal government is poised to make its single largest investment in semiconductor R&D ever.A national strategy for semiconductor R&D should target this investment toward critical gaps in the U.S.

14、R&D ecosystem to revitalize the innovation pipeline,to align R&D with commercial priorities,and to strengthen U.S.technological competitiveness.While the U.S.has world-class national labs,universities,and companies needed for innovations,its semiconductor R&D ecosystem faces challenges in directing

15、investments,resourcing,facilitating collaboration,and bringing innovations to market(i.e.,lab to fab gaps).If unaddressed,these challenges will limit the ecosystems effectiveness.Meanwhile,other regions are taking steps to mitigate these challenges and to improve the effectiveness of their own R&D e

16、cosystems through initiatives like the EUs own Chips Act and South Koreas“K-Semiconductor Belt”initiative.The funding of the 2022 CHIPS and Science Act will amplify the scope and impact of existing U.S.semiconductor R&D organizations by establishing two new entities,the National Semiconductor Techno

17、logy Center(NSTC)and the National Advanced Packaging Manufacturing Program(NAPMP).Executive SummaryThe NSTC and NAPMP should serve to bridge the gap between early stage R&D and at-scale production.Both should strengthen the R&D ecosystems ability to conduct R&D and commercialize technologies that ar

18、e 5 to 15 years from production,technologies for which regional leadership has yet to be determined.The NSTC and NAPMP can become hubs for aligning R&D efforts,both for industry and other agencies,allowing industry to participate in programs where it has interests,and enabling agencies to focus thei

19、r own funds on their respective missions.Transitioning and Scaling Pathfinding ResearchNSTC and NAPMP provide a critical framework,focus and funding for the U.S.R&D ecosystem,ensuring technology innovations that pave the way for sustaining long-term U.S.semiconductor leadership.The NSTC and NAPMP co

20、mplement the strong CHIPS Act provisions designed to increase domestic semiconductor capacity.The NSTC and NAPMP should be closely aligned with one another,and should thoroughly include industry voices in order to most effectively promote U.S.technological competitiveness and encourage commercial bu

21、y-in.Based on our extensive consultations with industry leaders,the NSTC and NAPMP should partner widely across the semiconductor industry and bolster the U.S.R&D ecosystems capabilities through investments in five key areas.Five key investment areas for NSTC and NAPMP 11The NSTC and NAPMP should su

22、pport full-stack innovation by convening companies to solve complex technological problems that benefit from collaboration across the full computing stack and accelerate the development of technologies,tools,and methodologies.1 For example,creating next-generation data centers requires bringing toge

23、ther expertise in advanced materials,new computing architectures,packaging,software,and more.In particular,the NAPMP can convene technical experts to provide input to organizations like Institute of Electrical and Electronics Engineers(IEEE)and Joint Electron Device Engineering Council(JEDEC)when de

24、veloping,for example,integration standards for heterogenous integration,chiplets,and other components of secure technologies.Collaborative Development 2&345The NSTC and NAPMP should promote a range of programs that expand the size and skills of the U.S.semiconductor R&D pipeline and workforce to def

25、end and strengthen the U.S.R&D ecosystem and the economic competitiveness it underpins.Without these efforts,the inadequate supply of highly skilled R&D workers those in semiconductor design,manufacturing,and the other activities of the value chain-threatens to limit the pace of innovation.2Workforc

26、eThe NSTC and NAPMP should play an active role in expanding,upgrading,and providing access to institutions technology development capabilities where they align with R&D priorities.The two initiatives must neither spread funding evenly nor concentrate investments in a single technology or location.Ra

27、ther,both must balance the benefits of a highly distributed network against the benefits of scale,based on technology needs.Specifically,it is critical that the NSTC and NAPMP use existing infrastructure where possible to leverage CHIPS funding and enable faster learnings by benefiting from availabl

28、e resources.This is especially important for piloting and prototyping to accelerate and broaden commercialization efforts.The primary support that the NSTC and NAPMP will provide for research efforts is the establishment of transition path for promising technologies through prototyping and scale-up.

29、1.The 2030 Decadal Plan for Semiconductors identifies 8 high level components of the compute stack:applications,software,algorithms,architectures,circuits,devices,structures,and materials.2.See BCGxSIAs Strengthening the Global Semiconductor Value Chain for additional information on the seven differ

30、entiated activities of the semiconductor value chainResearch Infrastructure and Development Infrastructure 2Semiconductors,or chips,are pervasive in,and increasingly critical to,the functioning of the modern world.From powering data centers analyzing historically unprecedented quantities of data,to

31、controlling the Mars rover Perseverance in challenging environments,the world demands more from its semiconductors today than it did just a few years ago.Meeting these demands and enabling innovation at semiconductor-dependent companies across the U.S.economy-will require sustained investments in se

32、miconductor research and development(R&D).R&D has been a critical element of the semiconductor industrys success since its inception.While previous SIA reports have focused on the activities that occur during semiconductor design or during semiconductor manufacturing,this report will discuss the rol

33、e of semiconductor R&D and its importance in technological competitiveness.In general,an innovation must traverse five phases of R&D to be commercially useful.These phases differ in important ways,including in the number of potential innovations in a portfolio and in the levels of ecosystem collabor

34、ation,investment needs,and technical challenges.(see Exhibit 1)As a potential innovation goes from new idea to adoption at production scale,the level of collaboration across organizations in the ecosystem changes.Basic research Semiconductor R&D is the process by which innovative ideas are transform

35、ed into technological advancements and capability to enable the creation of more,and more advanced,semiconductors 3that expands the base of knowledge is considered“pre-competitive.”Basic research typically involves collaboration among companies,governments,and other organizations in the R&D ecosyste

36、m with minimal supply chain or competition-related considerations.As a potential innovation draws closer to use in volume production,supply chain and competition-related considerations grow,and more R&D takes place within organizations rather than among them.Not all potential innovations reach volum

37、e production.A portfolio of many potential innovations is required for a handful of innovations to successfully reach volume production.Overall investment costs and technical challenges emerge through the phases,even as the number of remaining viable potential innovations declines.Given investment n

38、eeds,technical challenges,and ecosystem infrastructure limitations,many potential innovations often fail to traverse“the valley of death”of prototyping and piloting.Even when they do progress,the cost and talent constraints associated with scaling can be daunting financial risks can be orders of mag

39、nitude larger.(see Exhibit 2)4Semiconductor R&D is important and is part of a virtuous cycle of innovation that supports U.S.technological leadershipThe ability of innovations to successfully traverse the R&D phases is critical.When incorporated at volume production,innovations yield superior techno

40、logies and products.Superior technologies and products in turn bolster U.S.market share and profit margins,and provide the funds needed to make massive investments in future R&D.(see Exhibit 3)The virtuous cycle of innovation represents an opportunity and does not happen automatically.It depends on

41、a continual pipeline of potential innovations traversing the five phases.Historically,the U.S.R&D ecosystem has supported innovations throughout this process.For example,the U.S.military needed semiconductor materials in the 1980s with performance beyond the limits of silicon.The Office of Naval Res

42、earch(ONR)and Defense Advanced Research Projects Agency(DARPA)identified and facilitated academia-industry collaboration to advance compound semiconductor materials through the phases of innovation and tailor them to industrial uses.The resulting materials,like gallium nitride,are used today in civi

43、lian and military applications and are an area of strength for U.S.industry.A wide range of companies now invest in compound semiconductor materials for use in a range of applications from electric vehicles to mobile networks to defense.R&D is a critical competitive battleground.It is vital to long

44、term U.S.technology leadership that the most important semiconductor innovations can be commercialized in the U.S.R&D pipelines that lack support for commercialization of innovations can wind up accelerating efforts of other competing countries and regions including adversaries.The virtuous cycle of

45、 innovation presents a valuable opportunity,but its fulfillment is not certain.Fortunately,the coming years contain opportunities to strengthen 5the U.S.R&D ecosystem and extend the virtuous cycle of innovation and U.S.technological leadership-through the next generation of semiconductor technologie

46、s.Alongside the appropriation of$39 billion for semiconductor fabrication incentives,the 2022 CHIPS and Science Act provides$13 billion in funding for semiconductor R&D and the transition of technology from labs to the marketplace.This$13 billion is the focus of this report.With the enactment of the

47、 CHIPS and Science Act,Congress and the administration recognized the importance of semiconductor R&D to the United States.Innovation along existing and new dimensions will be required for the next generation of advancements as the strategies for improving computation technologies change.Investment

48、needs in existing dimensions like transistor scaling are rising.Alongside these,opportunities in areas like advanced packaging and heterogeneous integration are emerging.Innovations across multiple disciplines are required to create the chips that the U.S.economy will demand in the coming years.The

49、U.S.semiconductor industry is investing ever-increasing amounts to meet these needs,investing$50 billion in R&D in 2021 alone.Despite this,the U.S.R&D ecosystem today faces challenges in delivering the innovations needed.Important R&D enablers and infrastructure are lacking or limited in the U.S.,an

50、d mechanisms are limited for collaborative development across the computing stack.Semiconductors have driven transformative advances in every modern technology.Chips also will underpin advances in the“must-win”technologies of the future-including artificial intelligence(AI),quantum computing,and adv

51、anced wireless networks making continued U.S.leadership in semiconductors critical to our future.3 A national strategy for semiconductor R&D,focused on revitalizing the pipeline of innovation and aligning it with commercial priorities,will address critical gaps in the U.S.R&D ecosystem and strengthe

52、n U.S.technological competitiveness and leadership through the following decades.As an example of an innovation that began as R&D in the U.S.but was commercialized overseas,consider extreme ultraviolet(EUV)lithography.Lithography is a process in semiconductor manufacturing that uses light to produce

53、 extremely small patterns on materials like silicon wafers.EUV lithography is a highly advanced version of this process used for many of the most advanced chips,like those found in leading smartphones.U.S.public investment played an early and sustained role in supporting EUV lithography,while parall

54、el investments were made in Korea and Japan.New applications drove the need for continued transistor scaling in the late 1980s.While EUVs potential was known,many in the industry considered EUV infeasible given technical and other challenges.Nevertheless,DARPA funded the Advanced Lithography Program

55、 which conducted early research into EUV reflectometry.SEMATECH,a not-for-profit consortium that performed R&D to advance chip manufacturing,partnered across industry and academia for over 15 years to access and build out infrastructure and expertise that industry alone considered too risky.A collec

56、tion of companies,including ASML,Intel,Samsung,and Taiwan Semiconductor Manufacturing Company(TSMC),invested between$10 17 billion to mature EUV into a commercially viable technology.ASML today is the only company with the ability to implement EUV lithography technologies in a commercially viable wa

57、y.As of July 2022,only TSMC,Samsung,and Intel are using EUV to develop semiconductor process technology.3.Semiconductors were recognized as“must-win”technologies by the U.S.Innovation and Competition Act,the National Security Commission on Artificial Intelligence,and the White House Building Resilie

58、nt Supply Chains,Revitalizing American Manufacturing,and Fostering Broad-based Growth report.Spotlight:ExtremeUltraviolet Lithography6The semiconductor R&D ecosystem is currently composed of a broad range of institutions,including government agencies,academic institutions,private industry,and partne

59、rships.(see Exhibit 4)Each plays a distinct and significant role in facilitating innovation across the phases of innovation.These institutions include both funders and performers of R&D.Institutions that fund R&D may also perform R&D,and institutions that perform R&D may receive funding from a range

60、 of funders.In the U.S.R&D ecosystem,government,academia,and private industry all play a significant role in funding and performing the R&D that drives commercially useful innovation.7GovernmentGovernment agencies(e.g.,Department of Defense,Department of Energy,National Science Foundation,National I

61、nstitute of Standards and Technology)are critical funders of R&D in the ecosystem.Such government agencies provide essential support for research that is too distant,too uncertain,or too difficult for a single firm to turn into a competitive advantage.4Government-related entities(e.g.,the Air Force

62、Research Laboratory,the National Institute of Standards and Technology Material Measurement Laboratory)also perform research.Further,government also plays a significant role in shaping the infrastructure(e.g.,funding university nanofabs),enablers(e.g.,investing in basic research),and policies(e.g.,s

63、etting permitting rules for facilities)of the R&D ecosystem.Taken together,these factors catalyze private industry investment and R&D into potential semiconductor innovations.AcademiaAcademia is a key performer of R&D:academia performs basic research,performs applied research,and develops prototypes

64、.5 It also plays a significant role in training the semiconductor workforce.Academia plays a significant role in expanding the base of knowledge and disseminating findings that can be used by established companies and startups in industry.Private industryPrivate industry is both a funder and perform

65、er of R&D.6 A wide range of companies now fund,prototype,scale,and commercialize semiconductors and related services.There are several major types of companies that conduct semiconductor R&D:Integrated device manufacturers(IDMs)are vertically integrated companies that perform design and fabrication.

66、These companies combine the resources and expertise to bridge gaps between basic research and production,but there are only a few of these companies in the U.S.(e.g.,Intel,Micron,Samsung,and Texas Instruments).7 Fabless design companies(e.g.,Qualcomm,AMD,NVIDIA,and Apple)focus on semiconductor desig

67、n,the highest value-adding portion of semiconductor value chain.These companies represent approximately 55%of the private sector R&D8 and partner with other companies for semiconductor fabrication.9 Foundries meet the fabrication needs of both IDMs and fabless design firms.Foundries often focus excl

68、usively on fabricating chips designed by others(e.g.,TSMC,Samsung Foundry,Intel Foundry Services,and GlobalFoundries).Foundries invest in R&D related to manufacturing technologies and are responsible for a large share of advanced manufacturing.10 Semiconductor equipment and materials companies(e.g.,

69、Applied Materials,ASML,EMD Electronics,Lam Research,Tokyo Electron)develop advanced process and inspection systems required to produce chips.Equipment and materials companies invest in R&D for new process technologies,materials and manufacturing methods that enable the semiconductor technology roadm

70、ap,and contribute significant amount to R&D investment in the semiconductor industry on par with several U.S.chip manufacturers.Partnerships and other industry consortiumIn addition,public-private partnerships(PPPs)encompass a range of organizations operated by private sector stakeholders that are p

71、ublicly funded.Examples of PPPs include the federally funded research and development centers(FFRDCs)and SEMATECH.11 PPPs can be funders or performers of R&D.Examples of PPPs include:Federally Funded Research and Development Centers(FFRDCs),which include the national labs,are public-private partners

72、hips operated by academic institutions or private companies that are funded by and perform research for the federal government.Industry consortia of semiconductor companies and their suppliers created for various purposes.For example,the Semiconductor Research Corporation(SRC)is a consortium of semi

73、conductor companies as well as government agencies that funds high-technology research at more than a hundred universities.Its programs span a range of applications from artificial intelligence to automotive.4.National Research Council.1999.Funding a Revolution:Government Support for Computing Resea

74、rch.Washington,DC:The National Academies Press5.National Science Board,NSF.2020.Academic Research and Development.Science and Engineering Indicators 2020.NSB-2020-2.Alexandria,VA.6.Varadarajan et al.“Strengthening The Global Semiconductor Supply Chain In An Uncertain Era”,(BCG and SIA,April 2021).7.

75、MITRE Engenuity.2021.American Innovation,American Growth:A Vision for the National Semiconductor Technology Center.8.id.“Strengthening The Global Semiconductor Supply Chain In An Uncertain Era”9.id.“Strengthening The Global Semiconductor Supply Chain In An Uncertain Era”10.Foundries are responsible

76、for a large share of advanced manufacturing and control 78%global market for 14 nanometer or below technologynodes,100%for 5 nanometer technology nodes11.SEMATECH received public funding from 1988-1996,then it operated without futher public sector funding8 Non-academic research organizations work wi

77、th the U.S.R&D ecosystem on basic research.(See appendix:Non-academic research organizations)R&D organizations across the U.S.The organizations discussed above are major players in the U.S.R&D ecosystem.While clusters do exist in areas like Silicon Valley or North Texas,important stakeholders in the

78、 U.S.semiconductor R&D ecosystem are located across the country.(see Exhibit 5)Fabs focused on R&D or piloting can be found in at least 29 states,with additional R&D expertise at production fabs and universities with semiconductor programs.Exhibit 5:U.S.semiconductor R&D ecosystem is nationwide 1.In

79、cludes national laboratories with semiconductor fabrication facilities 2.Includes universities that particular in Semiconductor Research Corporation(SRC)programs or that host National Nanotechnology Coordinated InfrastructuresiteNote:No major semiconductor-related fabs,universities,or employment in

80、AlaskaSource:SIA;BCG analysis9The U.S.R&D ecosystem faces several challenges,including those related to piloting and prototyping,that hinder the effectiveness of the ecosystem.A well-functioning R&D ecosystem supports innovation by providing direction,resourcing,and collaboration to R&D efforts.The

81、U.S.retains a strong portfolio of national labs,universities,and companies,but its R&D ecosystem currently faces challenges in delivering needed innovations.Examples of these challenges include:Direction Numerous different government agencies and departments provide public investment in semiconducto

82、r R&D.These agencies and departments have critical missions and often take steps to collaborate,but their important needs and objectives are often distinct from those of private industry.As a result,gaps may emerge in which adequate R&D investment does not reach the technical areas for example,in ul

83、tra-low power computing dependent on collaborative innovations in materials,architectures,packaging,and software necessary to support continued U.S.technological competitiveness and enable their adoption at production-scale.ResourcingImportant infrastructure needed for R&D is lacking or limited dome

84、stically.For example,sub-60nm manufacturing is largely inaccessible to university researchers and startups,making it harder for U.S.-based semiconductor hardware startups to iterate on and develop their ideas in the U.S.The absence or insufficiency of R&D-related infrastructure hinders the overall e

85、cosystems ability to provide advancements.CollaborationImportant opportunities for innovation exist in areas like co-optimization that require collaboration across different layers of the computing stack.Advancing R&D in any given layer of the computing stack often requires highly specialized capabi

86、lities for both individuals and organizations and the U.S.R&D ecosystem lacks mechanisms to convene capabilities across companies to address these challenges.10Other regions are taking steps to mitigate these challenges and improve the relative effectiveness of their R&D ecosystems Regions around th

87、e world are taking steps to strengthen their semiconductor R&D ecosystems.Examples of the types of mechanisms used in other region to mitigate these challenges in their domestic R&D ecosystems include:While the U.S.continues to outspend other regions in public investment in semiconductor R&D in abso

88、lute terms,other regions provide more generous support for R&D.12 Other regions are expanding their investments in semiconductors too.Just since 2021,Japan,Singapore,South Korea,the European Union(in addition to individual EU member states like Spain)have all announced legislation to support their d

89、omestic semiconductor capabilities,including through investments in R&D.Mainland China too is investing over a hundred billion dollars to support its domestic semiconductor industry.In other words,other regions are taking steps to strengthen their own R&D ecosystems and close the gap on the relative

90、 appeal of U.S.-based innovation.Recent programs in the U.S.like DARPAs Electronic Resurgence Initiative(ERI)illustrate growing recognition of the importance of publicly funded semiconductor R&D.Sustained U.S.public investment in this space through existing and new entities can mitigate challenges i

91、n the U.S.R&D ecosystem,accelerate the pace of innovation,and extend U.S.technological competitiveness.Direction:Taiwans Ministry of Science&Technology supports industry through assessment of overall semiconductor R&D and its coverage of industry needs.Resourcing:Japans government will invest$6.8 bi

92、llion in onshore advanced chip manufacturing,mature chip production,and R&D.Collaboration:South Korea will build the“K-Semiconductor Belt”to connect metro areas across the computing stack to ease collaboration and support innovation across the computing stack.12.See Appendix:Support for semiconducto

93、rs in other regions11Public sector and private industry entities are set to invest$60 billion in semiconductor R&D in the U.S.in 2022.Private industry provides$50 billion(89%)of the total and public investment provides$6 billion(11%).CHIPS and Science Act funds the CHIPS Acts semiconductor-related R

94、&D programs at$5.5 billion for Fiscal Year 2023,to remain available until expended.(see Exhibit 6)Entities responsible for existing public investment of semiconductorR&D will continue to play a significant role in the U.S.R&D ecosystem 12Many existing organizations for public R&D funding play an imp

95、ortant and distinct role in the U.S.semiconductor R&D ecosystem.(see Exhibit 7)13Recognizing the importance of U.S.-based semiconductor manufacturing and R&D,Congress enacted the Creating Helpful Incentives for Producing Semiconductors for America Act(CHIPS Act)in 2021 and provided funding as part o

96、f the 2022 CHIPS and Science Act.The CHIPS Act constitutes the most significant federal effort in decades to support U.S.semiconductor manufacturing and seeks to ensure that the U.S.grows both capacity to fabricate more chips in the U.S.and capability to advance chipmaking technology in the U.S.The

97、CHIPS and Science Act appropriates$52 billion over five years to support semiconductor manufacturing,R&D,and technology transition,with funding frontloaded to earlier years.Of these funds,$39 billion fully 75%of the total is directed toward public financial assistance for constructing,modernizing,or

98、 expanding facilities and equipment in the U.S.The remaining$13 billion is directed toward R&D and the transition of technologies from labs to the marketplace.(see Exhibit 8)Relative to existing efforts,the CHIPS Act constitutes a major expansion of public investment in semiconductor R&D.Complementi

99、ng these entities,the CHIPS Act establishes important new organizations and provides an opportunity to address challenges tothe U.S.R&D ecosystem14The CHIPS Act establishes two major innovative programs related to R&D:National Semiconductor Technology Center(NSTC).A public-private partnership to fos

100、ter U.S.leadership in semiconductors by promoting advanced R&D and prototyping to strengthen U.S.technological competitiveness and supply chain security.National Advanced Packaging Manufacturing Program(NAPMP).A part of NIST,NAPMP is established to strengthen semiconductor advanced test,assembly,and

101、 packaging capabilities in the U.S.R&D ecosystem.The CHIPS Act establishes certain high-level objectives,the U.S.Department of Commerce retains significant discretion in how to structure the NSTC and NAPMP.In response to its request for information,the Department has received detailed feedback from

102、over 200 stakeholders on the incentives,infrastructure,and R&D needs to support a strong domestic semiconductor R&D ecosystem.14 Informed by extensive discussions with and input from SIA members,this report offers a synthesized,high-level industry perspective on how CHIPS Act R&D funding can be most

103、 effectively deployed to support U.S.technological competitiveness.Manufacturing USA institute:The Manufacturing USA Institute initiative was originally established in 2014 to boost the U.S.manufacturing sectors global competitiveness and foster innovation.13 Since inception,16 institutes across the

104、 U.S.have been created to invigorate U.S.manufacturing,each within a specific industry sector.Institutes are a critical resource for American innovation,supporting the initial stages of the innovation pipeline and building new and much needed communities where none exist.They serve to identify promi

105、sing high-impact technologies,then manage corresponding R&D projects performed in academic and industry research labs to further advance these technologies.Upon successful completion of these projects the technologies created can transfer to development facilities in industry or otherwise for testin

106、g,piloting,and scaling to manufacturing.The 2022 CHIPS and Science Act authorized the establishment of up to 3 Manufacturing USA Institutes to support work relating to semiconductor manufacturing including increased automation,advanced assembly and test,and workforce skills training.Funding for thes

107、e institutes is included as part of the overall R&D funding within the CHIPS and Science Act.The specific projects developed through this Manufacturing USA Institute would serve as a key pipeline for innovative technology in this sector and would be ideally transferred to either the NSTC or NAPMP fo

108、r testing,piloting,and scaling.The role of this Institute and others in the technology innovation process is clarified in Exhibit 4Spotlight:Manufacturing USA Institutes13.“History.”Manufacturing USA, 30 June 2022.14.Request for Information(RFI)notice“Incentives,Infrastructure,and Research and Devel

109、opment Needs to Support a Strong Domestic Semiconductor Industry”was posted by the Department of Commerce on January 23,2022.Responses are publicly available on Regulations.gov15Recognizing the centrality of private industry in U.S.economic and technological competitiveness,Congress authorized the N

110、STC as a public-private partnerships and established it through the U.S.Department of Commerce.15 NSTC leadership should seek to include voices from academia and government,and especially industry,to promote U.S.technological and economic competitiveness most effectively.Based on our discussions wit

111、h industry leaders,the NSTC and NAPMP should bolster the U.S.R&D ecosystems capabilities through investments in five key areas.(see Exhibit 9)15.Sections 9906(c)and(d)of the National Defense Authorization Act of 2021 which contains the CHIPS Act-directs that the NSTC be operated as a public private-

112、sector consortium with participation from the private sector,the Department of Energy,and the National Science Foundation.The NSTC and NAPMP shouldpromote U.S.economic competitiveness through investmentsin severalareas16Transitioning and Scaling Pathfinding ResearchU.S.semiconductor companies curren

113、tly partner with several existing and well-regarded organizations like Interuniversity Microelectronics Center(imec)and the Semiconductor Research Corporation(SRC)for many pre-competitive R&D needs.To support U.S.technological and economic competitiveness most effectively,the NSTC and NAPMP should a

114、ugment rather than replicate these organizations.In other words,while the NSTC and NAPMP infrastructure can support early-stage research,their primary focus should be on maturing and scaling those technologies that are ready to move beyond early-stage research.The NSTC and NAPMP should bring togethe

115、r research centers across government,academia,and industry to assess which technologies of commercial interest to companies in the U.S.may need but not be receiving funding for technology transition and scaling.Consistent with the five high-level challenges discussed in the 2030 Decadal Plan for Sem

116、iconductors,the NSTC and NAPMP should strengthen the U.S.R&D ecosystems ability to conduct and commercialize R&D technologies that are 5 to 15 years from production.16 This future focus for technology development is important:given the extended timelines over which semiconductor R&D occurs,the inves

117、tments necessary for todays major technological advancements were made many years ago.Rather than replicate capabilities currently found overseas or in domestic facilities,the NSTC and NAPMP should build and strengthen the R&D ecosystems capabilities in emerging areas like materials-beyond-CMOS,adva

118、nced packaging,heterogenous integration,and masking infrastructure in which regional leadership has yet to be determined.Although R&D funding should include an emphasis on both core semiconductor technologies and packaging technologies,there may be differences in the timelines over which breakthroug

119、hs can be realized into products in these two areas.Broadly,R&D for core semiconductor technologies should emphasize longer-term,potentially revolutionary efforts,where innovation will result from material,process flow,and tool improvements.These innovations will come from areas such as:Advanced arc

120、hitectures for logic,memory,analog 3D stacked devices Monolithically integrated functions Memory-centric computing Advanced materials for beyond Complementary Metal Oxide Semiconductor(CMOS)computing and novel paradigms Two dimensional materials16.The 2030 Decadal Plan for Semiconductors is publishe

121、d by the Semiconductor Research Corporation.It identifies five seismic shifts related to 1.analog electronics,2.new solutions in memory and storage,3.improvements in connectivity and communication capacity,4.breakthroughs in hardware security,and 5.improved compute energy efficiency.Additional infor

122、mation can be found here.17 Advanced functional materials Alternate paradigms such as photonic or neuromorphic High-voltage and-power materials Advanced RF materials General process developments Advanced lithography techniques Development of advanced light sources and EUV improvements Improvements i

123、n metallization Design innovations Superior domain specific accelerators across wider variety of applications Mixed-signal designs,integration of intelligence and sensing capabilities Design for security Tool improvements Integration of AI into design tools,higher design abstraction Superior tools f

124、or analog and RF circuits Tools with enhanced capability for full-stack optimization and enablement of hardware-software codesign Environmental Sustainability Process gases with a lower global warming potential(GWP)Photolithography and other chemicals that meet functional needs with an improved envi

125、ronmental profile,as well as detection and treatment technologies at extremely low concentrations Fab processes that satisfy demanding operational requirements while conserving natural resources(energy,water,etc.)On the other hand,packaging efforts should include technologies that help address indus

126、try challenges in the short-and medium-term.Scaling up of new packaging methods can occur more quickly and cheaply than fundamental semiconductor material and process advances.It is not unreasonable to expect packaging breakthroughs to impact the commercial sector between 5 to 10 years after the est

127、ablishment of the NSTC and NAPMP,or sooner in some rare cases.These innovations will come from areas like:Advanced testing and validation capabilities Design-for-test and data analysis for design error reduction Testing automation and integration of AI/ML tools Analog,RF,and mixed signal testing Het

128、erogenous integration Development of industry standards for integration Chiplet IP development and access Integration methods for novel computing paradigms(photonic,quantum,etc.)Advanced packaging and high-density interconnects(100 m IO pitch)Panel and wafer level high-bandwidth,low-latency high-den

129、sity 2.5D and 3D stacking and assembly methods Hybrid bonding,through-silicon-via,and advanced interposer development Advanced thermal compression bonding for device lifetime improvements Thermal management and crosstalk,noise,and parasitic reduction Flexible,constrained form-factor packaging Tool I

130、mprovements Package-level co-design tools Superior electrical,thermal,mechanical modeling and design tools Assembly and alignment automation18By investing in pathfinding researching across different investment areas and timelines,the NSTC and NAPMP can enable sustained improvements in core technolog

131、ies over two decades.Although the technical areas discussed above are categorized as falling under core semiconductor or packaging technologies uniquely,there will need to be significant coordination and cross-pollination of ideas between researchers and external experts in these areas.Prototyping a

132、nd Piloting InfrastructureThe NSTC and NAPMP must go beyond only funding or coordinating existing research efforts.The two should play an active role in facilitating access to prototyping facilities or to advanced simulation and modeling software.They must also expand access to capabilities that fac

133、ilitate technology transition from lab-to-fab such as prototyping and piloting and ensure the accessibility of these capabilities to researchers and startups.By facilitating access to these capabilities,the NSTC and NAPMP will broaden the pool of potential innovations able to traverse phases from ba

134、sic research to scaling and reach commercial usefulness.Semiconductor R&D capabilities are distributed widely technically and geographically across the U.S.ecosystem.To steward public investment well,the NSTC must neither spread funding evenly nor concentrate investments in a single technology or lo

135、cation.Under the guidance of the NSTC/NAPMP steering committees,the NSTC should expand and upgrade the distinct capabilities and infrastructure of a limited number of existing institutions.Expanding and upgrading institutions capabilities is important for reasons related to cost and time.Improving e

136、xisting facilities(so called brownfield development)improvements is cheaper and faster than building entirely new facilities(greenfield development).New semiconductor R&D facilities can take multiple years to build if the NSTC attempted to create new facilities,these facilities could be industry-lag

137、ging or out of the date by the time that construction was finished.17 The economics of expanding and upgrading are compelling.As the NSTC evaluates which institutions R&D infrastructure to strengthen,it must balance the benefits of a highly distributed network against the benefits of scale.Given the

138、 typically high total costs of each R&D-related facility,our analysis suggests that the NSTC should foster scale and prioritize upgrading fewer,more accessible,state-of-the-art facilities at leading universities and research centers to maximize the impact of a finite amount of public investment.Howe

139、ver,the facilities must be upgraded with an eye towards maximizing impact relative to cost.As an illustrative example,upgrading several universities from 200mm to 300mm wafer capabilities could easily exhaust all NSTC funds while providing few truly novel capabilities.In some cases,the NSTC/NAPMP st

140、eering committees may find it more financially prudent to leverage existing domestic industry capacity rather than upgrade lower-volume research capabilities.This could be the case for piloting infrastructure seeking to leverage 300mm wafer production capacity using industry-standard process flows,a

141、s an example.The center of gravity that the NSTC provides could open new possibilities for negotiating access to external capabilities.Examples include the coordination of multi-project wafer runs at commercial fabs,or access to commercial design tools for pre-competitive technologies.Infrastructure

142、 for packaging R&D should include 2.5D and 3D stacking and high-density redistribution,optical packaging and test,fan-out,hybrid bonding equipment,tools for advanced interposers(silicon,glass,and high density organic),and equipment for thermocompression bonding.Equipment for high-density solder bump

143、s,copper deposition,and fabrication of vias will be critical as well.Additionally,significant focus on advanced substrate process and flows 17.VerWey.“No Permits,No Fabs:The Importance of Regulatory Reform for Semiconductor Manufacturing”,(Center for Security and EmergingTechnology,October 2021).19i

144、s required.A major challenge in packaging,assembly,and testing(PAT)is the economics of domestic manufacturing.While traditional PAT is labor-intensive,advanced packaging will be more skill and automation-intensive in the U.S.and its economics must reflect this to be competitive.Furthermore,new testi

145、ng capabilities will be required.Negotiating access to design tools will be a significant value-add for the NAPMP,as with the NSTC.There are many successful models employed today for semiconductor-serving organizations that the NSTC and NAPMP could look to for guidance.One example is imec,which offe

146、rs many of the R&D and prototyping capabilities that are critical for the technology development pipeline.Other examples include the Manufacturing USA institutes,which create regional innovation hubs by partnering with research institutions and standing up new prototyping infrastructure,and Sandia N

147、ational Laboratorys Microsystems and Engineering Sciences Applications(MESA),which provides low-volume commercial foundry services and additional design,fabrication,package,and test capabilities to government and academic researchers.The NSTC and NAPMP infrastructure can pull inspiration from these

148、existing efforts but must go beyond the low-volume services that these existing organizations can provide.It is the ability to allow innovative materials,designs,and broad technologies at the research and prototyping levels to scale up to higher-volume production that grants the NSTC and NAPMP their

149、 differentiating value.Collaborative Development The engineering approaches to improving computing technology,as described by Moores Law,are changing as development and design costs rise.(see Exhibit 10)Innovation across the full computing stack,from materials and designs to system architecture and

150、software,is needed to unlock the next stages of semiconductor advancements.Full-stack innovation is hard:modern semiconductor companies are often highly specialized in distinct layers of the stack,and the U.S.R&D ecosystem currently lacks the mechanisms to coordinate this collaboration.20The NSTC an

151、d NAPMP should support full-stack innovation by convening companies to solve complex technology problems that require collaboration across the full computing stack and accelerate the development of technologies,tools,and methodologies.For example,the rapid growth in demand for cloud computing data c

152、enters has accentuated the need for semiconductors that deliver high compute performance with low power usage.Creating next-generation systems that meet this need requires bringing together expertise in advanced materials,new computing architectures,packaging,software,and more.The NAPMP could conven

153、e technology experts and stakeholders(including those from mission-driven governmental agencies)to provide input to groups like IEEE and JEDEC when establishing integration standards for heterogenous integration,chiplets,and other components of secure technologies.The two should own the responsibili

154、ty of expanding and upgrading the U.S.R&D and prototyping ecosystems infrastructure and capabilities to meet these ecosystem needs.18 Given the importance of innovations in areas like collaborative development,co-optimization,and heterogenous integration,the NSTC and NAPMP must partner widely across

155、 the industry.The two can then use their broad and representative networks across the industry to build a diversified technology and infrastructure portfolio of R&D,to facilitate more effective collaborative development,and to maintain a wide network of industry partners.(see Exhibit 11)WorkforceThe

156、 semiconductor industry is R&D-intensive and relies on highly skilled workers to conduct the R&D that leads to needed innovations.While the U.S.is home to many of the worlds best researchers,a shortage of skilled talent threatens to constrain the pace of innovation(see our report on semiconductor de

157、sign).At the same time,other regions are eager to attract home their nationals and provide extensive policy support to strengthen their domestic R&D ecosystems.(see Exhibit 12)Amid these competing efforts,the NSTC and NAPMP must strengthen the size and skills of the U.S.semiconductor R&D pipeline an

158、d workforce to defend the U.S.R&D ecosystem and the economic competitiveness it underpins.18.The Universal Chiplet Interconnect Express(UCIe),an industry initiative,to create a new open standard at the package is an example of collaboration across the computing stack that can accelerate technology d

159、evelopment.2122The NSTC and NAPMP could promote a range of programs to expand the pipeline of the U.S.semiconductor R&D workforce.According to our research,industry leaders believe that key steps for NSTC and NAPMP include:Invest in U.S.STEM education.Support curriculum development and standardizati

160、on at the undergraduate and graduate levels to expand the pipeline of workers with prerequisite STEM skills.Provide opportunities for students at the K-12 level to engage with the industry to gain an awareness of and fascination with semiconductor technologies.NSTC and NAPMP centers could collaborat

161、e with or help establish engineering summer camps at US universities to provide exposure to semiconductor R&D.Working with partner institutions and companies to provide scholarships and research fellowships can help increase the number of students pursuing 4+year degrees within the field.Attract STE

162、M workers to the industry.Educate and train students about career opportunities in the semiconductor industry through apprenticeships,internships,and mentorship programs.Work with community and technical colleges to develop programs to bring more technicians and tradespeople to the field and to rais

163、e awareness of semiconductor career pathways.Partner with retraining and cross-training programs for workers with existing foundational STEM skills,such as veteran employment organizations.Promote flexible work authorization.Promote flexible work authorization like optional practical training-that e

164、nable foreign nationals to work in the U.S.or hold temporary employment directly related to their major area of study if they graduate from U.S.universities with skills critical to industry.This could happen pre-completion or post-completion of the relevant degree.In addition,the NSTC and NAPMP must

165、 strengthen the skills of the workforce.According to our research,industry leaders believe that key steps for NSTC and NAPMP should include:Invest in worker retraining and upskilling.As the industry explores new dimensions of innovation,these programs can ensure the U.S.R&D ecosystem workforce is we

166、ll-equipped to drive future advances.Accelerate new employee readiness.Given the specialized skills needed for semiconductor R&D,new employees need time before they effectively engage in important R&D.The NSTC and NAPMP could establish prefab programs to enable a worker to contribute more quickly to

167、 R&D.The pipeline of highly skilled R&D workers currently threatens to limit the pace of innovation.By expanding the supply of these workers and upgrading their skills,the NSTC and NAPMP can strengthen the overall U.S.R&D ecosystem.23The U.S.can employ a range of best practices to ensure the success

168、 of this public investment The CHIPS Act constitutes a major expansion in U.S.public investment in semiconductor R&D.The U.S.can take several actions to ensure this investment complements existing public investment and revitalizes the virtuous cycle of innovation in the U.S.to strengthen the R&D eco

169、system.ConclusionBy incorporating the investments discussed here,the U.S.R&D ecosystem in 2030 should be characterized by a larger pipeline of new semiconductor products,tools,and processes,a bigger and more skilled workforce engaged in semiconductor R&D,and an accelerated timeline from basic resear

170、ch to commercialization.Since its inception,the U.S.R&D ecosystem has enabled a virtuous cycle of innovation that has contributed to U.S.technology leadership.The ecosystem remains strong,with world-class national labs and universities,along with companies that have invested an unprecedented$50 bill

171、ion in semiconductor R&D in 2021 alone.The funding from the 2022 CHIPS and Science Act and subsequent establishment of industry-led entities in the NSTC and NAPMP will provide a once-in-a-generation opportunity to revitalize the pipeline of innovation and will extend U.S.technological competitivenes

172、s through the following decades.Foster scale:The U.S.R&D ecosystem will be better served by fewer,more accessible,and best-in-class clusters including both physical infrastructure and workforce expertise-rather than many clusters less well-suited to industry R&D needs.Given costs of maintaining a la

173、rge network of potentially antiquated facilities,fostering scale allows a given amount of public investment to be spent in a more impactful manner.Focus on impact:Public investment in R&D should be aligned with identifiable objectives,including a focus on impactful new technologies and on potential

174、commercial viability.Investment should help commercialize innovative ideas and flexibly address barriers to fixing the innovation pipeline for promising technologies.Collaborate:The U.S.semiconductor R&D ecosystem contains and partners with many existing and effective organizations and programs.Wher

175、e possible,public investment should augment and coordinate with,rather than replicate,these organizations and programs.Look ahead:From both a technical and financial perspective,public investment should support the U.S.R&D ecosystem in meeting needs that are 5 to 15 years into the future.The infrast

176、ructure and enablers necessary for the next 3-5 years of technical advancements have already largely been built.Given that research needs in this industry can range from multi-year to multi-decade,financial investments must be predictable over extended periods of time.24Appendix:Non-academic researc

177、h organizations Private industry also works with non-academic research organizations in the U.S.and in other regions for basic research.This includes organizations like the Semiconductor Research Corporation(SRC),the Interuniversity Microelectronics Centre(imec),and CEA-Leti.While U.S.companies and

178、researchers are not restricted to working with U.S.-based research organizations,the non-academic research organizations in Europe and Asia are typically larger and better resourced than their U.S.peers.(see Exhibit 13)25Appendix:Support for semiconductorsin other regions While the U.S.continues to

179、outspend other regions in public investment in semiconductor R&D in absolute terms,other regions provide more generous support for R&D.The overall share of semiconductor-specific R&D funded by public investment in the U.S.is 23.3%.By comparison,the share is 35.7%across mainland China,the European Un

180、ion,Taiwan,Japan,and South Korea.(see Exhibit 14)2619.Lee,Jane Lanhee.“U.S.Chip Startups,Long Shunned in Favor of Internet Bets,Stir Excitement Again.”U.S.,5 May 2021, U.S.vs.China in Race to Build Chip Technology of Tomorrow.”PitchBook,4 May 2021, capital funding for semiconductor startups Amid sup

181、ply chain bottlenecks and high demand for chips,semiconductor startups in China and the U.S.have raised significant amounts of venture capital funding in recent years.Fueled in part by strong expected demand for artificial intelligence and machine learning chips,global venture capital investment set a quarterly record for deal value at$2.64 billion during the first three months 2021.70%of these funds were raised by Chinese semiconductor startups,with the U.S.raising 15%.U.S.venture capital funding for semiconductor startups has reached a 20-year high.(see Exhibit 15)1927

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