《Special Presentation 2:RISC-V.PDF》由会员分享,可在线阅读,更多相关《Special Presentation 2:RISC-V.PDF(10页珍藏版)》请在三个皮匠报告上搜索。
1、RISC-V+Chiplet to EnableFull Stack Acceleration for the DatacenterTHE RISC-V PERFORMANCE LEADERVentana Confidential2Ventana:High Performance RISC-V+Chiplet LeaderPioneer in Data Center semiconductors:30+years experienceWorlds first 64-bit ARM with Veloce(Acquired by AppliedMicro)Led Marvell BU deliv
2、ering Data Center class Networking,Communications,Compute,Storage and Wireless infrastructure productsWorlds first iSCSI with Platys,acquired by PMC-Sierra(Adaptec)One of the worlds leading CPU architects:35+years experienceArchitected K6 processor at startup Nexgen,acquired by AMDChief Architect at
3、 Siara Systems,acquired by RedBackArchitected first successful 64-bit ARM CPUBalaji BakthaFounder and CEO Greg FavorCo-founder and Chief ArchitectHighly experienced team with over 20 years average experienceCore team developed worlds first 64-bit High Performance ARM Processor(Veloce Technologies)De
4、livered several successful x86 processors with AMD Software team that enabled ARM for data center now doing RISC-VFounded in 2019 by industry veterans with a proven track record of delivering Data Center class processorsVentana Confidential3Typical Datacenter ArchitectureContent Delivery ServicesApp
5、 ServicesStorage ServersLoad BalancersWeb ServicesLoad BalancersLoad BalancersNetworking ServicesApplication Compute is 60%,Infrastructure Compute is 40%Ventana Confidential4Accelerator Use CasesCDNMediawiki,StreamingData Analytics,SearchSPARK,Elastic Search,SolrDatabasesRedis,MySQLComputational Sto
6、rageCEPHNetworking/Infrastructure OffloadsWeb ServicesApache,MemcachedAI/MLTensorFlow,PyTorchAlgorithmic AccelerationKey/Value Acceleration Compression/EncryptionPacket Parsing,Classification,TCP Offload,RegExWeb Serving,CachingTraining,InferenceTranscodingWorkloadsAcceleratorsVentana Confidential5D
7、omain Specific Acceleration for Workload EfficiencySource:Synopsys,https:/ is key to achieve performance gains going forwardFull stack acceleration is key to achieve best in class performanceSmartNIC+DSAVentana Confidential6Full Stack Acceleration OverviewWorkload Specific AcceleratorL7L4L1HardwareS
8、oftwareL2L3L5L6SmartNICApplicationsTCP/IPNetworking Acceleration&Infra OffloadsSmartNICoNetwork AccelerationoDatapath Processing AccelerationoInfrastructure OffloadsWorkload Accelerator(DSA)oAdds workload specific accelerationoWeb Services,Databases,Storage,Security,AI/MLVentana Confidential7Next Ge
9、n Accelerator Architecture with RISC-V and ChipletsChiplet based Domain Specific AcceleratorCoherent InterconnectPCIe/CXL Gen5DDR5DDR5X86,ARM64 CPUFGPAMultiple memory copies lower performance and increases powerHigh latency PCIe interfaceLimited programmability fixed function accelerationTraditional
10、 SmartNICsRISC-Vs ISA extensibility is a key enablerScalable Compute,Accelerator and I/O performance Low latency,low power parallel D2D interfaceCoherent memory eliminates data copies,improves performanceFully programmable,flexible architectureDoman SpecificAcceleratorRISC-V Compute ChipletDSA Chipl
11、etD2D InterfacesSmartNICCoherent InterconnectPCIe/CXL Gen5DDR5DDR5SmartNIC ChipletVentana Confidential8DSA Building BlocksChiplet based Domain Specific AcceleratorDoman SpecificAcceleratorCompute ChipletDSA ChipletD2D InterfacesCoherent InterconnectPCIe/CXL Gen5DDR5DDR5SmartNIC ChipletHardware/Softw
12、are CodesignRISC-V ISA Extensions and Custom InstructionsDomain Specific AcceleratorsInfrastructure OffloadsFull Software ProgrammabilitySimple Programming ModelSame programming model for host and DSAUnified Compiler9 RISC-V ISAs extensible architecture,and Chiplets are needed to drive overall efficiency for full stack acceleration in the datacenter Ventana leads the market with the RISC-V based Veyron CPU cores and chiplets Ventana is uniquely positioned to drive the datacenter accelerator segmentIn Closing Thank YouTHE RISC-V PERFORMANCE LEADER