《HC2022.Ranovus.ChristophSchulien.v13.pdf》由会员分享,可在线阅读,更多相关《HC2022.Ranovus.ChristophSchulien.v13.pdf(32页珍藏版)》请在三个皮匠报告上搜索。
1、August 22,2022(c)Ranovus Inc,20221Enabling Scalable Application-Specific Optical Engines(ASOE)by Monolithic Integration of Photonics and ElectronicsChristoph Schulien,HotChips 2022,August 22,2022Acknowledgements2Id like to emphasize that the development of the ODIN technology is based on the contrib
2、utions of the entire team at Ranovus Without each individuals contributions this achievement would have not been possible.August 22,2022(c)Ranovus Inc,2022OutlineAugust 22,2022(c)Ranovus Inc,20223qKey Drivers for Optical InterconnectqRanovus Monolithic Platform ODINqApplications Space and Design Tar
3、getsqSystem Design ApproachqEnabling TechnologyqMonolithic EPIC Design and Key Building Blocksq100G PAM-4 Ring Resonator Modulators(RRM)q100G PAM-4 RF ElectronicsqFiber Assembly,Lasers,PackagingqODIN8P Test ResultsqSummary&OutlookOutlineAugust 22,2022(c)Ranovus Inc,20224qKey Drivers for Optical Inte
4、rconnectqRanovus Monolithic Platform ODINqApplications Space and Design TargetsqSystem Design ApproachqEnabling TechnologyqMonolithic EPIC Design and Key Building Blocksq100G PAM-4 Ring Resonator Modulators(RRM)q100G PAM-4 RF ElectronicsqFiber Assembly,Lasers,PackagingqODIN8P Test ResultsqSummary&Ou
5、tlookKey Drivers for Optical InterconnectAI/ML Workloads Require more&more Compute&MemoryAugust 22,2022(c)Ranovus Inc,20225 GPU&ML ASIC Scale outGPUN x Proprietary Switches.32 nodes(256 GPUs)Application Specific Optical EnginesPluggable ModuleNear Packaged OpticsCo-Packaged Optics Disaggregation of
6、Compute&Memory Ethernet Switching Networks What does it take to buildApplication Specific Optical Engines(ASOE)?Knowledge of the Application&SystemsComplete End to End System ModelDifferentiated and Validated IP in:High-Speed Mixed-Signal ElectronicsSilicon Photonics(SiP)LasersAdvanced PackagingAdva
7、nced Manufacturing&TestingDifferentiated Foundries for Electronics/SiP/Laser chipsDifferentiated OSATs for Manufacturing and Testing Miniaturization is the Key Design Target to MeetPerformance,Cost,Power&Latency RequirementsApplication Specific Optical EnginesPluggable ModuleNear Packaged OpticsCo-P
8、ackaged OpticsAugust 22,2022(c)Ranovus Inc,20226OutlineqKey Drivers for Optical InterconnectqRanovus Monolithic Platform ODINqApplications Space and Design TargetsqSystem Design ApproachqEnabling TechnologyqMonolithic EPIC Design and Key Building Blocksq100G PAM-4 Ring Resonator Modulators(RRM)q100G
9、 PAM-4 RF ElectronicsqFiber Assembly,Lasers,PackagingqODIN8P Test ResultsqSummary&OutlookAugust 22,2022(c)Ranovus Inc,20227ODIN8P EPIC Design ObjectivesTwo Initial Variants for Different Target ApplicationsAugust 22,2022(c)Ranovus Inc,20228ILS Version(ILS:Integrated Laser Source)ELS Version(ELS:Exte
10、rnal Laser Source)Both chips pictureEPIC:Electronic/Photonic ICMonolithically integrated fully bidirectional 800G analog optoelectronic(O/E)engines on a single EPIC die protocol agnostic Target applications:Co-Packaged Optics(CPO)chiplets for integration with large Switch ASIC or CPU/GPU(typically a
11、n ELS use case)Integration with close proximity PAM4 DSP in pluggable modules for Ethernet applications(typically an ILS use case)Full compliance to Ethernet DR-4+specifications,including full interoperabilityPower dissipation target:4WEnabling further power savings when operated in an optimized pro
12、prietary link(e.g.by lowered laser power)These versions are first instantiations of a series of chips for the ODIN Application-Specific Optical Engine(ASOE)product familyEnd to End System Design for Analog OEA Specific Challenge for Direct-Drive OpticsAugust 22,2022(c)Ranovus Inc,20229The challenge:
13、An analog or direct-drive optical engine(OE)is representing only the analog front-end part of a complete transmission channel Transmission end points are determined by the Tx and Rx of the respective SerDes employed For high symbol rates and/or longer electrical interconnects,overall system performa
14、nce equally depends on SerDes analog features and equalizer capabilities as well as on OE features SerDes is always a third-party element close cooperation required with partners owning the SerDes IPTypical co-design scenario:Ranovus and SerDes partner share models for their respective elements on a
15、 chosen platform:IBIS-AMI is one option,running on a system/signal integrity simulator(e.g.:Keysight ADS)Other option:directly sharing Matlab modelsOwner of the board/package design provides s-parameters to describe the electrical interconnects typically gained from 3D EM simulationsRanovus Custom O
16、E Transmission ModelPD0.9 A/WIncl.shot noiseRx DSPRx Transmission lineRanovus Rx PD4thorder Bessel filter1.0 A/W6-bit ADC w/clipping at 1.5Vrms,5 tap FFEReference Rx(TDECQ)Ideal Optical ModulatorLaserNo RINTest pattern sourceLow pass filter+WGN SourceTDECQ,OMAStressed Receiver SensitivityER=3.5 dBSE
17、CQ=3.4dBRanovus Tx Reference TxPAM4 symbol sequenceTx DSPTx Transmission lineCadence waveformLaserTx MUXOptical TxDriverVbias-136 dB/HzFull Ranovus LinkTIARx DEMUXSystem Simulation Setup for Interworking(against Reference Tx/Rx)or for End-End Link ModelingAugust 22,2022(c)Ranovus Inc,202210TDECQ:Tra
18、nsmitter&Dispersion Eye Closure,QuaternaryOMA:OpticalModulationAmplitudeSECQ:Stressed Eye Closure,QuaternaryER:Extinction RatioIBIS-AMI Optical Re-Driver ModelAugust 22,2022(c)Ranovus Inc,202211Compiled version of Matlab modelqPurpose:Co-simulation of complete electrical-optical-electrical(EOE)chain
19、 with packaged Serdes model and s-parametersqEOE re-driver model variablesqRRM Detuning Frequency(Hz)qChannel Loss(dB)qLaserPowerqGain(dB)qConfigurationqModulationqModTypeqDesignTypeqDRVTypeqbePlotqDebugExample:output waveform from IBIS-AMI simulation with Re-Driver modelRe-Driver symbol for ADS sim
20、ulatorQing Xu et al.,End-to-end IBIS-AMI Modeling and Simulations of Electrical/Optical LinksTechnology Platform for Monolithic EPIC SOC IntegrationAugust 22,2022(c)Ranovus Inc,202212Global Foundries material courtesy of Vikas GuptaBeside using foundry PDK,Ranovus owns or co-develops critical IP:Rin
21、g Resonator Modulator(RRM)Lasers&laser attach design/process Fiber assembly process All electronic designs,including RF building blocks and control IPRanovus chose Global Foundries 45nm Process 45SPCLO as the optimum EPIC integration platform OutlineqKey Drivers for Optical InterconnectqRanovus Mono
22、lithic Platform ODINqApplications Space and Design TargetsqSystem Design ApproachqEnabling TechnologyqMonolithic EPIC Design and Key Building Blocksq100G PAM-4 Ring Resonator Modulators(RRM)q100G PAM-4 RF ElectronicsqFiber Assembly,Lasers,PackagingqODIN8P Test ResultsqSummary&OutlookAugust 22,2022(c
23、)Ranovus Inc,202213ODIN8P EPIC,ELS Version Key Functional BlocksDie size strongly determined by photonics:FVGA+mode converters V-groove pitch:250m VG+mode converter length:2mm Laser cavities(in case of ILS)Assembly rules related to fiber attach,for things like:Fiber mounting glass block Keep-out zon
24、es for underfill or epoxy outflow etc.Overall:photonics determine“beachfront”widthELS EPIC Die100GRx MacroPD+TIARing Resonator Modulator(RRM)8x Rx+8x Tx FVGA+Mode Converters100GTx MacroDRV+RRMAugust 22,2022(c)Ranovus Inc,202214Ring Resonator Modulator(RRM)DesignModulate charge carrier concentration
25、in reverse-biased pn junctionRRM are key enablers for very compact optical transmitters,because of their small footprint(typically 35GHzRF gain:10dBLow freq.corner:2Vdiff,pk-pkSingle supply:3.3VPower dissipation:30GHzTIA max gain:72dB(4k)Low freq.corner:50kHzOutput Swing Target:450mVdiff,pk-pkInput
26、referred noise:14pA/(Hz)Performance PVT-stabilizedSingle supply:1.8VPower dissipation:120mWSystem Simulation Input:Time Domain Waveforms or Frequency Responses(e.g.magnitude,phase+noise current spectral density)Input referred noise pA/(Hz)PD:Photodetector;TIA:Transimpedance AmplifierODIN EPIC Fiber
27、Attach&PackagingEPIC dieLasersV grooves(FVGA)(prior to fiber attach)16 Fiber passive V-Groove attach systemFlip-chip technology used for SiP with V-Groove Passive attach of 16 fiber arrayPerformance Targets:Insertion Loss 3 decades of margin vs.IEEE spec)BER100G PAM4-Slicer Eye&Histogram Sample100G
28、PAM48 channels BER results August 22,2022(c)Ranovus Inc,202221106.25Gbps PAM4 TX QualityAveraged Optical Tx from ODIN8PCh0Ch1Ch3Ch2Ch4Ch5Ch7Ch6ChannelCh0Ch1Ch2Ch3Ch4Ch5Ch6Ch7TDECQ(dB)After IEEE 802.3bs TDECQ EQ1.291.191.001.091.301.571.391.56Optical Tx passing IEEE 802.3bs TDECQ spec(3.5dB)with good
29、 marginAugust 22,2022(c)Ranovus Inc,202222Error-free 32Gbps NRZ OperationODIN is protocol&data rate agnostic ready to support PCIe Gen5 application 32G NRZ Slicer Eye&Histogram Sample32G NRZEye Diagram Sample Rx OutputAugust 22,2022(c)Ranovus Inc,202223ODIN8P 800G EPIC Power ConsumptionAugust 22,202
30、2(c)Ranovus Inc,202224Power consumption as measured on multiple units,design targets achieved or exceededELS Version ILS version ElementConsumption WEfficiency pJ/bitConsumption WEfficiency pJ/bitLasersN/A1.2 1.5Tx RF Channels0.7 0.80.7 0.8Rx RF Channels1.0 1.11.0 1.1Other circuitry0.5 0.60.5 0.6Tot
31、al2.2 2.52.75 3.13.4 4.04.25 5.0ODIN8P enabling lowest power 2x400GE-DR4 QSFP/OSFP module designsOutlineqKey Drivers for Optical InterconnectqRanovus Monolithic Platform ODINqApplications Space and Design TargetsqSystem Design ApproachqEnabling TechnologyqMonolithic EPIC Design and Key Building Bloc
32、ksq100G PAM-4 Ring Resonator Modulators(RRM)q100G PAM-4 RF ElectronicsqFiber Assembly,Lasers,PackagingqODIN8P Test ResultsqSummary&OutlookAugust 22,2022(c)Ranovus Inc,202225It takes a lot to buildApplication Specific Optical Engines(ASOE)!Knowledge of the Application&SystemsComplete End to End Syste
33、m ModelDifferentiated and Validated IP in:High-Speed Mixed-Signal ElectronicsSilicon Photonics(SiP)LasersAdvanced PackagingAdvanced Manufacturing&TestingDifferentiated Foundries for Electronics/SiP/Laser chipsDifferentiated OSATs for Manufacturing and Testing Miniaturization is the Key Design Target
34、 to MeetPerformance,Cost,Power&Latency RequirementsApplication Specific Optical EnginesPluggable ModuleNear Packaged OpticsCo-Packaged OpticsAugust 22,2022(c)Ranovus Inc,202226RANOVUS ODINMulti Terabit platform for optical interconnectThank You!Thank You!27Backup SlidesAugust 22,2022(c)Ranovus Inc,2
35、02228Typical System Design Workflow IBIS-AMI(Joined Development with SerDes Partner)Joint work between Xilinx&Ranovus,presented DesignCon 2021Received Best Paper Awarded August 22,2022(c)Ranovus Inc,202229Monolithic EPIC IntegrationImplications,Benefits&ChallengesAugust 22,2022(c)Ranovus Inc,202230C
36、hallenges:BOX related thermal limitations need to be taken into account in circuit designNo metal allowed in close vicinity of optical waveguidesRouting constrained,as only upper metal layers can be used to cross WGNarrow Si WG have non-negligible insertion loss,should be kept as short as possiblePl
37、acement&routing constrainedOptical I/O(i.e.interfacing to optical fiber)requires significant spaceFor Fiber V-Groove Arrays(FVGA)and mode conversionBenefits:Enables a true opto-electronic system-on-chipSmallest possible size of a solution,as all functional blocks are on single dieSimplified packagin
38、g(no complex die-on-die etc.)Super low-parasitic RF interconnect between photonic(modulator,Photodetector PD)and RF elements(modulator driver DRV,transimpedance amplifier-TIA)No impedance matching requiredEnables best-in-class power dissipationEnables superior TIA noise performanceSOI prevents subst
39、rate coupling and X-talkSome Implications:Photonics implemented by planar waveguides(WG)in Si To provide optical confinement,waveguides must be embedded in a lower index material(SiO2)WG&active circuits constructed above a thick buried oxide(BOX),constituting an SOI technology Different properties f
40、or TE and TM WG modes:Polarization management becoming increasingly importantEPIC Design&IntegrationAugust 22,2022(c)Ranovus Inc,202231Design challenges for a monolithic EPIC SOC:Interactive multidisciplinary workflow requiredStrong interdependencies make floor planning and integration a highly iter
41、ative processPackaging&assembly requirements also need to be considered in floor planningSYSTEM DESIGNTOP LEVELCONTROLRFSIPPACKAGINGO-Band Lasers for EPIC IntegrationILS conceptODIN DFB O-Band Laser Co-Designed to support SiP Optical/Physical InterfaceOptical Designed for back-reflection(BR)resilien
42、ceIsolator free interfaceRIN(Relative Intensity Noise)performance under BRPower/Size EfficiencyPhysicalSize minimized for EPIC mountingCustomized for precise passive mountingPatent application US020210364694A120211125()ILS Back-reflection Resilience RIN vs.BRAugust 22,2022(c)Ranovus Inc,202232 Innovative laser mounting mechanism,supportingMounted/soldered laser and test before attach Relaxed tolerances for submountattachBurn in capability before attachFeatures and facility to perform machine vision/optical alignment